ICSSSTUA32864B Datasheet, PDF (5/11 Pages) Integrated Device Technology – 25-Bit Configurable Registered Buffer for DDR2

ICSSSTUA32864B
Block Diagram for 1:2 mode (positive logic)
RST#
CK
CK#
V_REF
DCKE
DODT
DCS#
CSR#
1D
C1
R
1D
C1
R
1D
C1
R
D1
0
1
1055A—01/28/05
To 10 Other Channels
*Note: Disabled in 1:1 configuration
5
1D
C1
R
QCKEA
QCKE B*
QODTA
QODTB*
QCSA#
QCSB#*
Q1A
Q1B^*