ICS9DB202_06 Datasheet, PDF (5/13 Pages) Integrated Device Technology – PCI EXPRESS JITTER ATTENUATOR

ICS9DB202
PCI EXPRESS JITTER ATTENUATOR
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TYPICAL PHASE NOISE AT 100MHZ
PCI Express™ Filter
100MHz
RMS Phase Jitter (Random)
1.5MHz to 22MHz = 2.42ps (typical)
Raw Phase Noise Data
Phase Noise Result by adding
PCI Express™ Filter to raw data
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
The illustrated phase noise plot was taken using a low phase
noise signal generator, the noise floor of the signal generator is
less than that of the device under test.
Using this configuration allows one to see the true spectral purity
or phase noise performance of the PLL in the device under test.
Due to the tracking ability of a PLL, it will track the input signal up
to its loop bandwidth. Therefore, if the input phase noise is greater
than that of the PLL, it will increase the output phase noise
performance of the device. It is recommended that the phase
noise performance of the input is verified in order to achieve the
above phase noise performance.
IDT^™ / ICS^™ PCI EXPRESS JITTER ATTENUATOR
5
ICS9DB202CG REV B JULY 14, 2006