ICS86004-02 Datasheet, PDF (5/10 Pages) Integrated Device Technology – 62.5MHZ TO 250MHZ, 1-TO-4 LVCMOS/LVTTL ZERO DELAY CLOCK BUFFER

ICS86004-02
62.5MHz TO 250MHz, 1-TO-4 LVCMOS/LVTTL ZERO DELAY CLOCK BUFFER
PARAMETER MEASUREMENT INFORMATION
PRELIMINARY
1.65V±5%
1.65V±5%
V_DD,
V_DDO
V_DDA
LVCMOS
GND
SCOPE
Qx
-1.65V±5%
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
2.05V±5%
1.25V±5%
2.05V±5%
V_DD
V_DDO
LVCMOS
GND
V_DDA
SCOPE
Qx
-1.25V±5%
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
V_DD
CLK
2
V_DD
FB_IN
2
➤_t(Ø)
t(Ø) mean = Static Phase Offset
(where t(Ø) is any random sample, and t(Ø) mean is the average
of the sampled cycles measured on controlled edges)
STATIC PHASE OFFSET
20%
Clock
Outputs
80%
t_R
80%
t_F
20%
OUTPUT RISE/FALL TIME
V
DDO
Qx
2
V
DDO
Qy
2
t sk(o)
OUTPUT SKEW
Q0:Q3
V
DDO
2
tcycle n
V
DDO
2
➤
tcycle n+1
t jit(cc) = tcycle n –tcycle n+1
1000 Cycles
V
DDO
2
➤
CYCLE-TO-CYCLE JITTER
CLK
Q0:Q3
V_DD
2
V_DDO
2
tp_LH
PROPAGATION DELAY
Q0:Q3
V_DDO
2
t _PW
V_DDO
2
t _PERIOD
odc = ^{t PW}
t _PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
V_DD
2
V_DDO
2
tp_HL
V_DDO
2
IDT^™ / ICS^™ LVCMOS/LVTTL ZERO DELAY CLOCK BUFFER
5
ICS86004AG-02 REV A NOVEMBER 3, 2006