ICS8545BGLF Datasheet, PDF (5/15 Pages) Integrated Device Technology – LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER

ICS8545
LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
Table 4C. LVDS DC Characteristics, V_DD = 3.3V ± 5%, T_A = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
V_OD
∆V_OD
V_OS
∆V_OS
I_Oz
I_OFF
I_OSD
I_OS
V_OH
V_OL
Differential Output Voltage
V_OD Magnitude Change
Offset Voltage
V_OS Magnitude Change
High Impedance Leakage
Power Off Leakage
Differential Output Short Circuit Current
Output Short Circuit Current
Output Voltage High
Output Voltage Low
200
1.125
-10
-20
0.9
Typical
280
1.25
5
±1
±1
-3.5
-3.5
1.34
1.06
Maximum
360
40
1.375
25
+10
+20
-5
-5
1.6
Units
mV
mV
V
mV
µA
µA
mA
mA
V
V
AC Electrical Characteristics
Table 5. AC Characteristics, V_DD = 3.3V ± 5%, T_A = 0°C to 70°C
Parameter Symbol
Test Conditions
f_MAX
t_PD
tjit
Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
IJ 650MHz
156.25MHz, Integration Range:
12kHz – 20MHz
tsk(o)
Output Skew; NOTE 2, 4
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80% @ 50MHz
Minimum Typical
1.4
Maximum
650
3.6
Units
MHz
ns
0.13
ps
40
ps
500
ps
200
400
600
ps
45
50
55
%
All parameters measured at f_MAX unless noted otherwise.
NOTE 1: Measured from V_DD/2 of the input to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V_DD/2 of the input to the differential output crossing point.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
IDT™ / ICS™ LVDS FANOUT BUFFER
5
ICS8545BG REV. D OCTOBER 28, 2008