ICS8545BGLF Datasheet, PDF (1/15 Pages) Integrated Device Technology – LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER

LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS
FANOUT BUFFER
ICS8545
Description
The ICS8545 is a low skew, high performance 1-to-4
ICS
LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer and a
HiPerClockS™ _{member of the HiPerClockS™ family of High}
Performance Clock Solutions from IDT. Utilizing Low
Voltage Differential Signaling (LVDS) the ICS8545
provides a low power, low noise, solution for distributing clock
signals over controlled impedances of 100Ω. The ICS8545
accepts a LVCMOS/LVTTL input level and translates it to 3.3V
LVDS output levels.
Guaranteed output and part-to-part skew characteristics make the
ICS8545 ideal for those applications demanding well defined
performance and repeatability.
Features
• Four differential LVDS output pairs
• Two LVCMOS/LVTTL clock inputs to support redundant
or selectable frequency fanout applications
• Maximum output frequency: 650MHz
• Translates LVCMOS/LVTTL input signals to LVDS levels
• Output skew: 40ps (maximum)
• Part-to-part skew: 500ps (maximum)
• Propagation delay: 3.6ns (maximum)
• Additive phase jitter, RMS: 0.13ps (typical)
• Full 3.3Vsupply mode
• 0°C to 70°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Block Diagram
LK_EN ^Pullup
nD
Q
LE
CLK1 ^Pulldown
00
Q0
Q0
CLK2 ^Pulldown
1¹
Q1
K_SEL ^Pulldown
Q1
Q2
Q2
Q3
Q3
OE ^Pullup
Pin Assignment
GND 1
CLK_EN 2
CLK_SEL 3
CLK1 4
nc 5
CLK2 6
nc 7
OE 8
GND 9
VDD 10
20 Q0
19 Q0
18 VDD
17 Q1
16 Q1
15 Q2
14 Q2
13 GND
12 Q3
11 Q3
ICS8545
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm
package body
G Package
Top View
IDT™ / ICS™ LVDS FANOUT BUFFER
1
ICS8545BG REV. D OCTOBER 28, 2008