ICS85222-02 Datasheet, PDF (5/12 Pages) Integrated Circuit Systems – 1-TO-2 LVCMOS / LVTTL-TO DIFFERENTIAL HSTL TRANSLATOR

ICS85222-02
1-TO-2, LVCMOS/LVTTL-TO-DIFFERENTIAL HSTL TRANSLATOR
APPLICATION INFORMATION
RECOMMENDATIONS FOR UNUSED OUTPUT PINS
OUTPUTS:
HSTL OUTPUT
All outputs must be terminated with 50Ω to ground.
SCHEMATIC EXAMPLE
Figure 2 shows a schematic example of ICS85222-02. In the
example, the input is driven by a 7 ohm LVCMOS driver with a
series termination. The decoupling capacitor should be physically
located near the power pin. For ICS85222-02, the unused output
need to be terminated.
VD D =3. 3V
Q2
Ro ~ 7 Ohm
R6 43
Driv er_LVCMOS
Zo = 50 Ohm
U1
5
6 ^GND
7
8
nc
CLK
VDD
nQ1
4
3
Q1
nQ0
Q0
2
1
VDD=3.3V
ICS85222-02
C1
0. 1u
Zo = 50 Ohm
Zo = 50 Ohm
R1
50
Zo = 50 Ohm
Zo = 50 Ohm
R3
50
-
+
R2
50 HSTL Input
-
+
R4 HSTL Input
50
FIGURE 2. ICS85222-02 HSTL BUFFER SCHEMATIC EXAMPLE
IDT^™ / ICS^™ DIFFERENTIAL HSTL TRANSLATOR
5
ICS85222AM-02 REV. B SEPTEMBER 12, 2007