ICS85222-02 Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – 1-TO-2 LVCMOS / LVTTL-TO DIFFERENTIAL HSTL TRANSLATOR

ICS85222-02
1-TO-2, LVCMOS/LVTTL-TO-DIFFERENTIAL HSTL TRANSLATOR
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
Q0, nQ0
Output
Differential output pair. HSTL interface levels.
3, 4
Q1, nQ1
Output
Differential output pair. HSTL interface levels.
5
GND
Power
Power supply ground.
6
nc
Unused
No connect.
7
CLK
Input Pulldown LVCMOS / LVTTL clock input.
8
V_DD
Power
Positive supply pin.
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
NOTE: Unused output pairs must be terminated.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R
PULLDOWN
Parameter
Input Capacitance
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
kΩ
IDT^™ / ICS^™ DIFFERENTIAL HSTL TRANSLATOR
2
ICS85222AM-02 REV. B SEPTEMBER 12, 2007