ICS9FG104D Datasheet, PDF (4/17 Pages) Integrated Device Technology – Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA

ICS9FG104D
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
Absolute Max
Symbol
VDDxx
Parameter
3.3V Supply Voltage
Ts
Storage Temperature
Tambient Ambient Operating Temp•(Commerical Grade)
Tambient Ambient Operating Temp•(Industrial Grade)
Tcase
Case Temperature
ESD prot Input ESD protection•human body model
Min
-65
0
-40
2000
Max
Units
4.6
V
150
°_C
+70
°C
+85
°C
115
°C
V
Electrical Characteristics - Input/Supply/Common Output Parameters
T_A = TAM BIENT; Supply Voltage V_DD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V_IH
3.3 V +/-5%
2
V_IL
3.3 V +/-5%
V_SS - 0.3
I_IH
V_IN = V_DD
-5
I_IL1
V_IN = 0 V; Inputs with no pull- _-5
up resistors
I_IL2
V_IN = 0 V; Inputs with pull-up _-200
resistors
V_DD + 0.3 _V
1
0.8
V
1
5
uA
1
uA
1
uA
1
I_DD3.3OP
Operating Supply Current
Input Frequency³
Pin Inductance¹
Input/Output
Capacitance¹
Clk Stabilization^1,2
Modulation Frequency
Modulation Frequency
DIF output enable
I_DD3.3STOP
F_i
L_pin
C_IN
C_OUT
T_STABcom
T_STABind
f_MOD
f_MOD
t_DIFOE
Full Active, C_L = Full load;
f = 400 MHz
Full Active, C_L = Full load;
f = 100 MHz
All outputs stopped driven
All outputs stopped Hi-Z
SEL14M_25M# = 0
SEL14M_25M# = 1
Logic Inputs
Output pin capacitance
From V_DD Power-Up to 1st
clock (Commercial)
From V_DD Power-Up to 1st
clock (Industrial)
SEL14M_25M# = 0
SEL14M_25M# = 1
DIF output enable after
DIF_Stop# de-assertion
125
150 mA
110
125 mA
106
48
22.5 25.00
12.886 14.31818
1.5
120
60
27.5
15.75
7
5
6
mA
mA
MHz
MHz
nH
pF
pF
1.8 ms
1.8 ms
32.541
kHz
32.467
kHz
15
ns
1
1
1
1
3
3
1
1
1
1,2
1,2
1,3,4
1,3,4
1
Input Rise and Fall times t_R/t_F
20% to 80% of VDD
5
ns
1
1_{Guaranteed by design, not 100% tested in production.}
2_{See timing diagrams for timing requirements.}
3 _{Input frequency should be measured at the REF pin and tuned to 0 PPM to meet}
ppm frequency accuracy on PLL outputs.
4 _{These values assume 25MHz or 14.31818MHz inputs respectively. Using a higher or lower frequency}
will scale these frequencies accordingly. The output frequecy selected by the FS inputs will also scale.
For example, 27MHz input with an FS selection of 100MHz will yield an output frequency of 27/25 x 100 =
108MHz.
IDT^® Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
1541C—12/16/10
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