ICS844021I-01 Datasheet, PDF (4/13 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO- LVDS CLOCK GENERATOR

ICS844021I-01
FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR
PRELIMINARY
TABLE 3D. LVDS DC CHARACTERISTICS, V_DD = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
V_OD
Differential Output Voltage
Δ V_OD
V_OD Magnitude Change
V_OS
Offset Voltage
Δ V_OS
V Magnitude Change
OS
NOTE: Please refer to Parameter Measurement Information for output information.
Typical
400
10
1.3
10
Maximum
Units
mV
mV
V
mV
TABLE 3E. LVDS DC CHARACTERISTICS, V_DD = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
V_OD
Differential Output Voltage
Δ V_OD
V_OD Magnitude Change
V_OS
Offset Voltage
Δ V_OS
V_OS Magnitude Change
NOTE: Please refer to Parameter Measurement Information for output information.
Typical
400
10
1.2
10
Maximum
Units
mV
mV
V
mV
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
Test Conditions
Minimum Typical Maximum
Fundamental
24.5
34
50
7
100
Units
MHz
Ω
pF
µW
TABLE
5A.
AC
CHARACTERISTICS,
V
DD
=
3.3V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
f_OUT
tjit(Ø)
Output Frequency
RMS Phase Jitter ( Random);
NOTE 1
125MHz @ Integration Range:
1.875MHz - 20MHz
133.33MHz @ Integration Range:
1.875MHz - 20MHz
166.66MHz @ Integration Range:
1.875MHz - 20MHz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
NOTE 1: Please refer to the Phase Noise Plots following this section.
TABLE 5B. AC CHARACTERISTICS, V_DD = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
f_OUT
tjit(Ø)
Output Frequency
RMS Phase Jitter ( Random);
NOTE 1
125MHz @ Integration Range:
1.875MHz - 20MHz
133.33MHz @ Integration Range:
1.875MHz - 20MHz
166.66MHz @ Integration Range:
1.875MHz - 20MHz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
NOTE 1: Please refer to the Phase Noise Plots following this section.
Minimum Typical Maximum Units
122.5
170
MHz
0.32
ps
TBD
ps
TBD
ps
300
ps
50
%
Minimum Typical Maximum Units
122.5
170
MHz
0.31
ps
TBD
ps
TBD
ps
320
ps
50
%
IDT^™ / ICS^™ LVDS CLOCK GENERATOR
4
ICS844021BGI-01 REV. C SEPTEMBER 27, 2007