ICS83021I Datasheet, PDF (4/12 Pages) Integrated Circuit Systems – 2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR

ICS83021I
1-TO-1 DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
AC Electrical Characteristics
Table 4A. AC Characteristics, V_DD = 3.3V ± 0.3V, T_A = -40°C to 85°C
Parameter Symbol
Test Conditions
f_MAX
t_PD
tsk(pp)
Output Frequency
Propagation Delay, NOTE 1
Part-to-Part Skew; NOTE 2, 3
ƒ ≤ 350MHz
tjit
Buffer Additive Phase Jitter, RMS;
100MHz, Integration Range
refer to Additive Phase Jitter Section
(637kHz – 10MHz)
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
0.8V to 2V
ƒ ≤ 166MHz
166MHz < ƒ ≤ 350MHz
Minimum
1.7
100
45
40
Typical
350
2.0
0.21
250
50
50
Maximum
2.3
500
400
55
60
Units
MHz
ns
ps
ps
ps
%
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at f_MAX unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the output at V_DD/2.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at V_DD/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Table 4B. AC Characteristics, V_DD = 2.5V ± 5%, T_A = -40°C to 85°C
Parameter Symbol
Test Conditions
f_MAX
t_PD
tsk(pp)
Output Frequency
Propagation Delay, NOTE 1
Part-to-Part Skew; NOTE 2, 3
ƒ ≤ 350MHz
tjit
Buffer Additive Phase Jitter, RMS;
100MHz, Integration Range
refer to Additive Phase Jitter Section
(637kHz – 10MHz)
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
ƒ ≤ 250MHz
250MHz < ƒ ≤ 350MHz
Minimum
1.9
250
45
40
Typical
350
2.2
0.21
50
50
Maximum
2.5
500
550
55
60
Units
MHz
ns
ps
ps
ps
%
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at f_MAX unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the output at V_DD/2.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at V_DD/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
IDT™ / ICS™ LVCMOS/LVTTL TRANSLATOR
4
ICS83031AMI REV. C OCTOBER 31, 2008