9ZX21201 Datasheet, PDF (4/16 Pages) Integrated Device Technology – 12-OUTPUT DIFFERENTIAL Z-BUFFER FOR PCIE GEN2/3 AND QPI

9ZX21201
12-Output Differential Z-buffer for PCIe Gen2/3 and QPI
Pin Description (continued)
33 GND
34 DIF_4
35 DIF_4#
36 vOE4#
37 vOE5#
38 DIF_5
39 DIF_5#
40 VDD
41 GND
42 DIF_6
43 DIF_6#
44 vOE6#
45 vOE7#
46 DIF_7
47 DIF_7#
48 GND
49 VDD
50 DIF_8
51 DIF_8#
52 vOE8#
53 vOE9#
54 DIF_9
55 DIF_9#
56 VDD
57 VDD
58 GND
59 DIF_10
60 DIF_10#
61 vOE10#
62 vOE11#
63 DIF_11
64 DIF_11#
PWR
OUT
OUT
IN
IN
OUT
OUT
PWR
PWR
OUT
OUT
IN
IN
OUT
OUT
PWR
PWR
OUT
OUT
IN
IN
OUT
OUT
PWR
PWR
PWR
OUT
OUT
IN
IN
OUT
OUT
Ground pin.
0.7V differential true clock output
0.7V differential Complementary clock output
Active low input for enabling DIF pair 4
1 =disable outputs, 0 = enable outputs
Active low input for enabling DIF pair 5. This pin has an internal pull-down
1 =disable outputs, 0 = enable outputs
0.7V differential true clock output
0.7V differential Complementary clock output
Power supply, nominal 3.3V
Ground pin.
0.7V differential true clock output
0.7V differential Complementary clock output
Active low input for enabling DIF pair 6. This pin has an internal pull-down
1 =disable outputs, 0 = enable outputs
Active low input for enabling DIF pair 7. This pin has an internal pull-down
1 =disable outputs, 0 = enable outputs
0.7V differential true clock output
0.7V differential Complementary clock output
Ground pin.
Power supply, nominal 3.3V
0.7V differential true clock output
0.7V differential Complementary clock output
Active low input for enabling DIF pair 8. This pin has an internal pull-down
1 =disable outputs, 0 = enable outputs
Active low input for enabling DIF pair 9. This pin has an internal pull-down
1 =disable outputs, 0 = enable outputs
0.7V differential true clock output
0.7V differential Complementary clock output
Power supply, nominal 3.3V
Power supply, nominal 3.3V
Ground pin.
0.7V differential true clock output
0.7V differential Complementary clock output
Active low input for enabling DIF pair 10. This pin has an internal pull-down
1 =disable outputs, 0 = enable outputs
Active low input for enabling DIF pair 11. This pin has an internal pull-down
1 =disable outputs, 0 = enable outputs
0.7V differential true clock output
0.7V differential Complementary clock output
IDT^® 12-Output Differential Z-buffer for PCIe Gen2/3 and QPI
4
1682B- 12/08/11