SAP5 Datasheet, PDF (38/66 Pages) Integrated Device Technology – AS-Interface Spec. V3.0 Compliant Universal AS-i IC

SAP51 / SAP5S Datasheet
5.8.5. Special Function of DSTBn
In addition to the standard output function, the Data Strobe Pin serves as an external reset input for all operational
modes of the SAP5. Pulling the DSTBn pin low for more than a minimum reset time generates an unconditioned
reset of the SAP5, which is immediately followed by an initialization of the State Machine (EEPROM read out).
For further information on the SAP5 reset behavior, especially in regard to the signal timing, see section 5.13.
5.9. Data and Parameter Port Configuration
Data and Parameter Ports are configured by programming the IO_Code in the EEPROM (see Table 4.2). The
configuration also depends on the Safety_Mode_Enable setting (see Table 4.4). Table 5.14 lists the different
configurations selected by the IO_Code settings.
NOTE: Table 5.14 refers to slaves that are not running in Safety Mode (for Safety Mode details, see section 5.18)
The following configurations are possible:
• OUT: output only; data are valid up to the next DSTBn/PSTBn strobe pulse
• IN: input only; open-drain output is fixed at the high-impedance state
• I/O: bi-directional port with timing according to Figure 5.2 and Figure 5.3
• INOUT: If IO_Code = 7, the Parameter Ports are configured as outputs after WPAR master calls and as
inputs after DEXG master calls, respectively.
• PASSIV: no input function and open-drain output is fixed at the high-impedance state
If any of the D0 to D3 Data Ports is configured as OUT, the SAP5 slave answer to a DEXG master request
contains the respective information bit I[3:0] received from the master. However, Parameter Ports P[3:0] are
always operated as bi-directional, including a read-back of the actual port level as described in section 5.8.
Table 5.14 Data and Parameter Port Configuration for Non-Safety-Mode Operation
Note: See important table notes at the end of the table.
IO_Code
D0
D1
D2
D3 ¹⁾
P0
P1
0
IN
IN
IN
IN
OUT
OUT
1
IN
IN
IN
OUT
OUT
OUT
2
IN
IN
IN
I/O
OUT
OUT
3
IN
IN
OUT
OUT
OUT
OUT
4
IN
IN
I/O
I/O
OUT
OUT
5
IN
OUT
OUT
OUT
OUT
OUT
6
IN
I/O
I/O
I/O
OUT
OUT
7 ²⁾
OUT
OUT
OUT
OUT
INOUT
INOUT
8
OUT
OUT
OUT
OUT
OUT
OUT
9
OUT
OUT
OUT
IN
OUT
OUT
A
OUT
OUT
OUT
I/O
OUT
OUT
P2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
INOUT
OUT
OUT
OUT
P3 ¹⁾
OUT
OUT
OUT
OUT
OUT
OUT
OUT
INOUT
OUT
OUT
OUT
© 2016 Integrated Device Technology, Inc.
38
January 28, 2016