IDT72T51546 Datasheet, PDF (32/64 Pages) Integrated Device Technology – 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (32 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648 bits and 2,359,296 bits

IDT72T51546/72T51556 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES
(32 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648 and 2,359,296 bits
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
BYTE ORDER ON INPUT PORT:
D35-D27
A
D26-D18
B
D17-D9
C
D8-D0
D
Write to Queue
BYTE ORDER ON OUTPUT PORT:
BM IW OW
LLL
BM IW OW
HL L
BM IW OW
HL H
BYTE ORDER ON INPUT PORT:
Q35-Q27
A
Q26-Q18
B
Q17-Q9
C
Q8-Q0
D
(a) x36 INPUT to x36 OUTPUT
Read from Queue
Q35-Q27 Q26-Q18
Q17-Q9
C
Q8-Q0
D
1st: Read from Queue
Q35-Q27 Q26-Q18
Q17-Q9
A
Q8-Q0
B
2nd: Read from Queue
(b) x36 INPUT to x18 OUTPUT
Q35-Q27 Q26-Q18
Q17-Q9
Q8-Q0
D
1st: Read from Queue
Q35-Q27 Q26-Q18
Q17-Q9
Q35-Q27 Q26-Q18
Q17-Q9
Q8-Q0
C
2nd: Read from Queue
Q8-Q0
B
3rd: Read from Queue
Q35-Q27 Q26-Q18
Q17-Q9
Q8-Q0
A
4th: Read from Queue
(c) x36 INPUT to x9 OUTPUT
D35-D27
D26-D18
D17-D9
A
D8-D0
B
1st: Write to Queue
D35-D27 D26-D18
D17-D9
C
D8-D0
D
2nd: Write to Queue
BYTE ORDER ON OUTPUT PORT:
BM IW OW
HHL
BYTE ORDER ON INPUT PORT:
Q35-Q27
C
Q26-Q18
D
Q17-Q9
A
Q8-Q0
B
(d) x18 INPUT to x36 OUTPUT
D35-D27 D26-D18
D17-D9
D8-D0
A
D35-D27
D26-D18
D17-D9
D8-D0
B
D35-D27 D26-D18
D17-D9
D8-D0
C
D35-D27 D26-D18
D17-D9
D8-D0
D
Read from Queue
1st: Write to Queue
2nd: Write to Queue
3rd: Write to Queue
4th: Write to Queue
BYTE ORDER ON OUTPUT PORT:
BM IW OW
HHH
Q35-Q27
D
Q26-Q18
C
Q17-Q9
B
Q8-Q0
A
(e) x9 INPUT to x36 OUTPUT
Read from Queue
5998 drw09
Figure 4. Bus-Matching Byte Arrangement
32