IDT70V7288S_07 Datasheet, PDF (3/16 Pages) Integrated Device Technology – HIGH-SPEED 3.3V 32K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH EXTERNAL BANK SELECTS

IDT70V7288S/L
64K x 16 3.3V Bank-Switchable Dual-Ported SRAM with External Bank Selects
Pin Configurations^(1,2,3)
INDEX
Industrial and Commercial Temperature Ranges
A6L
1100 ^{99 98}
97 96 95
94
93 92
91 90
89 88
87 86
85 84
83 82
81
80 79
78 77
76
75
A6R
A7L 2
74
A7R
A8L 3
73
A8R
A9L 4
72
A9R
A10L 5
71
A10R
A11L 6
70
A11R
A13L 7
69
A13R
NC 8
68
NC
BKSEL0
LBL
UBL
R _CE0L
CE1L
O MBSELL
Vcc
F _R/WL
OEL
GND
D _GND
E _I/O15L
I/O14L
D _I/O13L
I/O12L
N ^S _I/O11L
ME _IGN ^I/O10L
9
67
10
11
12
IDT70V7288PF
PN100-1(4)
66
65
64
13
100-Pin TQFP
63
14
Top View(5)
62
15
61
16
60
17
59
18
58
19
57
20
56
21
55
22
54
23
53
24
52
25
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
BKSEL3
LBR
UBR
CE0R
CE1R
,
MBSELR
GND
R/WR
OER
GND
GND
I/O15R
I/O14R
I/O13R
I/O12R
I/O11R
I/O10R
4077 drw 02
M ^S _NOTES:
O _Pin ^{E 1. All VCC pins must be connected to power supply.}
Names 2. All GND pins must be connected to ground supply.
C ^{D 3. Package body is approximately 14mm x 14mm x 1.4mm.}
4. This package code is used to reference the package diagram.
NOT ^{RENEW 5. This text does not indicate orientation of the actual part-marking.}
A0 - A13^(1,6)
BA0 - BA1⁽¹⁾
MBSEL⁽¹⁾
BKSEL0-3⁽²⁾
R/W⁽¹⁾
OE⁽¹⁾
CE0, CE1⁽¹⁾
UB, LB⁽¹⁾
Address Inputs
Bank Address Inputs
Mailbox Access Control Gate
Bank Select Inputs
Read/Write Enable
Output Enable
Chip Enables
I/O Byte Enables
I/O0 - I/O15⁽¹⁾
Bidirectional Data Input/Output
INT⁽¹⁾
Interrupt Flag (Output)⁽³⁾
VCC⁽⁴⁾
3.3VPower
GND⁽⁵⁾
Ground
NOTES:
4077 tbl 01
1. Duplicated per port.
2. Each bank has an input pin assigned that allows the user to toggle the assign-
ment of that bank between the two ports. Refer to Truth Table IV for more details.
When changing the bank assignments, accesses of the affected banks must
be suspended. Accesses may continue uninterrupted in banks that are not
being reallocated.
3. Generated upon mailbox access.
4. All Vcc pins must be connected to power supply.
5. All GND pins must be connected to ground supply.
6. The first six address pins (A0-A5) for each port serve dual functions. When MBSEL
= VIH, the pins serve as memory address inputs. When MBSEL = VIL, the pins serve
as mailbox address inputs (A6-A13 ignored).
6.342