ICS570 Datasheet, PDF (3/11 Pages) Integrated Circuit Systems – Multiplier and Zero Delay Buffer

ICS570
MULTIPLIER AND ZERO DELAY BUFFER
ZDB AND MULTIPLIER
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
1
S1
Input
2
VDD Power
3
GND Power
4
ICLK
Input
5
FBIN
Input
6
S0
Input
7
CLK Output
8
CLK/2 Output
External Components
Pin Description
Select 1 for output clock. Connect to GND, VDD, or float per decoding
Connect to +3.3 V (ICS570B). Connect to +5.0 V (ICS570A).
Connect to ground.
Reference clock input.
Feedback clock input.
Select 0 for output clock. Connect to GND, VDD, or float per decoding
Clock output per table above.
Clock output per table above. Low skew divide by two of pin 7 clock.
The ICS570 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be connected
close to the part to minimize lead inductance. No external power supply filtering is required for this device. A 33Ω
series terminating resistor can be used next to each output pin.
Recommended Circuit
S1
VDD
GND
Input
S0
FBIN
CLK
CLK/2
ICLK
CLK
CLK/2
x2 Mode (S1, S0 = 1, 0)
CLK/2 Feedback
ICLK
CLK
CLK/2
x2 Mode (S1, S0 = 1, 1)
CLK Feedback
IDT™ / ICS™ MULTIPLIER AND ZERO DELAY BUFFER
3
ICS570
REV K 073007