9VRS4338D Datasheet, PDF (3/23 Pages) Integrated Device Technology – VERY LOW POWER CLOCK FOR 2011 NETBOOKS

9VRS4338D
VERY LOW POWER CLOCK FOR 2011 NETBOOKS
Pin Descriptions (cont.)
25 GNDSATA
PWR Ground pin for the SATA outputs
26 SATA#_LRS
Complementary clock of low power differential push-pull SATA clock pair with
OUT
integrated 33ohm series resistor. No 50 ohm resistor to GND needed.
27 SATA_LRS
28 SRC4#_LRS
29 SRC4_LRS
30 VDDSRC_LVIO
True clock of low power differential push-pull SATA clock pair with integrated
OUT _{33ohm series resistor. No 50 ohm resistor to GND needed.}
Complementary clock of differential 0.8V push-pull SRC output with integrated
OUT
33ohm series resistor. No 50ohm resistor to GND needed.
OUT ^{True clock of differential 0.8V push-pull SRC output with integrated 33ohm}
series resistor. No 50ohm resistor to GND needed.
PWR VDD for SRC I/O. Nominally 1.05V to 1.5V from external power supply
31 PCI_STOP#_3.3
Stops all stoppable PCI and SRC clocks at logic 0 level, when low. Free running
IN
PCI and SRC clocks are not effected by this input. This input is 3.3V tolerant.
32 SRC3#_LRS
33 SRC3_LRS
34 GNDSRC
35 SRC2#_LRS
36 SRC2_LRS
37 CPU_STOP#_3.3
38 CPU_ITP#/SRC1#_LRS
39 CPU_ITP/SRC1_LRS
40 VDD_CORE_1.5
41 VDDCPU_LVIO
42 CPU1#_LRS
43 CPU1_LRS
44 GNDCPU
45 CPU0#_LRS
46 CPU0_LRS
47 CLKPWRGD/PD#_3.3
48 GNDREF
Complementary clock of differential 0.8V push-pull SRC output with integrated
OUT
33ohm series resistor. No 50ohm resistor to GND needed.
OUT ^{True clock of differential 0.8V push-pull SRC output with integrated 33ohm}
series resistor. No 50ohm resistor to GND needed.
PWR Ground pin for the SRC outputs
Complementary clock of differential 0.8V push-pull SRC output with integrated
OUT
33ohm series resistor. No 50ohm resistor to GND needed.
True clock of differential 0.8V push-pull SRC output with integrated 33ohm
OUT
series resistor. No 50ohm resistor to GND needed.
IN Stops stoppable CPU c locks when enabled. This is a 3.3V tolerant input.
Complementary clock of low power differential CPU_ITP/SRC pair with
integrated 33ohm series resistor. No 50ohm resistor to GND needed. The pin
OUT function is determined by the latched value on ITP_EN:
0 = SRC0#
1 = CPU ITP#
True clock of low power differential CPU_ITP/SRC pair with integrated 33ohm
series resistor. No 50ohm resistor to GND needed. The pin func tion is
OUT determined by the latc hed value on ITP_EN:
0 = SRC0
1 = CPU_ITP
PWR Power for PLL c ore components requiring 1.5V
PWR VDD for CPU I/O. Nominally 1.05V to 1.5V from external power supply.
OUT ^{Complementary clock of differential pair 0.8V push-pull CPU outputs with}
integrated 33ohm series resistor. No 50 ohm resistor to GND needed.
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
OUT _{series resistor. No 50 ohm resistor to GND needed.}
PWR Ground pin for the CPU outputs
Complementary clock of differential pair 0.8V push-pull CPU outputs with
OUT
integrated 33ohm series resistor. No 50 ohm resistor to GND needed.
OUT ^{True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm}
series resistor. No 50 ohm resistor to GND needed.
This 3.3V LVTTL input notifies device to sample latched inputs and start up on
IN first high ass ertion, or exit Power Down Mode on subsequent assertions. Low
enters Power Down Mode.
PWR Ground pin for the REF outputs.
IDT® VERY LOW POWER CLOCK FOR 2011 NETBOOKS
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9VRS4338D
REV A 022616