9DBU0941_17 Datasheet, PDF (3/17 Pages) Integrated Device Technology – 9-Output 1.5V PCIe Gen1-2-3 Fanout Buffer with Zo=100ohms

9DBU0941 DATASHEET
Pin Descriptions
PIN #
PIN NAME
1 vSADR_tri
2 vOE8#
3 DIF8
4 DIF8#
5 VDDR1.5
6 CLK_IN
7 CLK_IN#
8 GNDR
9 GNDDIG
10 SCLK_3.3
11 SDATA_3.3
12 VDDDIG1.5
13 VDDIO
14 vOE0#
15 DIF0
16 DIF0#
17 vOE1#
18 DIF1
19 DIF1#
20 VDD1.5
21 VDDIO
22 GND
23 DIF2
24 DIF2#
25 vOE2#
26 DIF3
27 DIF3#
28 vOE3#
29 GND
30 VDDO1.5
31 VDDIO
32 DIF4
33 DIF4#
34 vOE4#
35 DIF5
36 DIF5#
37 vOE5#
38 VDD1.5
39 VDDIO
40 GND
TYPE
DESCRIPTION
LATCHED Tri-level latch to select SMBus Address. It has an internal 120kohm pull down
IN resistor. See SMBus Address Selection Table.
IN
Active low input for enabling output 8. This pin has an internal 120kohm pull-down.
1 = disable outputs, 0 = enable outputs.
OUT Differential true clock output.
OUT Differential complementary clock output.
PWR ^{1.5V power for differential input clock (receiver). This VDD should be treated as an}
Analog power rail and filtered appropriately.
IN True input for differential reference clock.
IN
GND
GND
IN
I/O
PWR
Complementary input for differential reference clock.
Analog ground pin for the differential input (receiver)
Ground pin for digital circuitry.
Clock pin of SMBus circuitry, 3.3V tolerant.
Data pin for SMBus circuitry, 3.3V tolerant.
1.5V digital power (dirty power)
PWR Power supply for differential outputs
Active low input for enabling output 0. This pin has an internal 120kohm pull-down.
IN
1 = disable outputs, 0 = enable outputs.
OUT
OUT
IN
OUT
OUT
Differential true clock output.
Differential complementary clock output.
Active low input for enabling output 1. This pin has an internal 120kohm pull-down.
1 = disable outputs, 0 = enable outputs.
Differential true clock output.
Differential complementary clock output.
PWR
PWR
GND
OUT
OUT
IN
Power supply, nominally 1.5V
Power supply for differential outputs
Ground pin.
Differential true clock output.
Differential complementary clock output.
Active low input for enabling output 2. This pin has an internal 120kohm pull-down.
1 = disable outputs, 0 = enable outputs.
OUT
OUT
IN
GND
PWR
PWR
OUT
OUT
IN
OUT
OUT
IN
PWR
PWR
GND
Differential true clock output.
Differential complementary clock output.
Active low input for enabling output 3. This pin has an internal 120kohm pull-down.
1 = disable outputs, 0 = enable outputs.
Ground pin.
Power supply for outputs, nominally 1.5V.
Power supply for differential outputs
Differential true clock output.
Differential complementary clock output.
Active low input for enabling output 4. This pin has an internal 120kohm pull-down.
1 = disable outputs, 0 = enable outputs.
Differential true clock output.
Differential complementary clock output.
Active low input for enabling output 5. This pin has an internal 120kohm pull-down.
1 = disable outputs, 0 = enable outputs.
Power supply, nominally 1.5V
Power supply for differential outputs
Ground pin.
MARCH 9, 2017
3
9-OUTPUT 1.5V PCIE GEN1-2-3 FANOUT BUFFER WITH ZO=100OHMS