8V97053L Datasheet, PDF (29/68 Pages) Integrated Device Technology – Low Power Wideband Fractional RF Synthesizer / PLL

Table 7L. Register 2: 1-Bit Power Down. Function Description
Name
Description
Factory Default
PwrDwn
POWER DOWN
0
Function
0 = Disabled
1 = Enabled
Table 7M. Register 2: 1-Bit Charge Pump High-Impedance. Function Description
Name
Description
Factory Default
Function
CP_HIGHZ
CP HIGHZ
0
0 = Disabled
1 = Enabled
Table 7N. Register 2: 3-Bit Control Bits. Function Description¹
Name
Description
Function
CB[3:1]
Control Bits
010 = Register 2 is programmed
NOTE 1. The user has to set CB[3:1] to 010 in order to write to Register 2.
8V97053L Datasheet
©2016 Integrated Device Technology, Inc.
29
August 18, 2016