English
Language : 

IDT8T49N008I Datasheet, PDF (28/38 Pages) Integrated Device Technology – Fourth Generation FemtoClock NG PLL technology
IDT8T49N008I Data Sheet
PROGRAMMABLE FEMTOCLOCK® NG LVPECL/LVDS CLOCK GENERATOR WITH 8-OUTPUTS
3 .3 V
R1
4.7K
R2
4 .7 K
U1
AD D R _SE L 17
FS EL1
20 AD D R _SE L
FS EL0
16 FS E L1
C LK_S EL
39 FS E L0
C LK _SE L
SC LK
SD A TA
33
32 SD ATA
SC LK
25MH z(12pf )
11
XTAL_I N
12
XTAL_OU T
X1
C18
C23
9pF
9pF
Zo = 50 Ohm
Zo = 50 Ohm
R 3 50
R 4 50
14
CLK
15
nCLK
P EC L D riv er
R5
50
VC C _19
C15
0. 1uF
19
VCC_38 38
C10
0.1uF
VC C
VC C
VC C A
C7
0.1uF
VC C O
35
VC C A
5
26 VC C O
VC C O
3.3V
F B1
1
2
B LM18BB 221SN 1
C6
0.1uF
C17
0.1uF
V C C _19
C14
10 u F
C9
0.1uF
36
LO CK
1
Q0 2
nQ0
3
Q1 4
nQ1
6
Q2 7
nQ2
8
Q3 9
nQ3
30
Q4 29
nQ4
28
Q5 27
nQ5
25
Q6 24
nQ6
23
Q7 22
nQ7
10
VE E 13
VE E 18
VE E 21
VE E 31
VE E 34
VE E 37
VE E 40
VE E
41
epad
R6
330
LOCK
3.3V
Q0_P
Q0_N
Q1_P
Q1_N
Q2_P
Q2_N
Q3_P
Q3_N
Q4_P
Q4_N
Q5_P
Q5_N
Q6_P
Q6_N
Q7_P
Q7_N
R7
133
Z o = 50 Ohm
Z o = 50 Ohm
R9
82.5
R8
133
+
-
R10
8 2 .5
Optional Four Resistor
Thevinin Termination
Z o = 50 Ohm
Z o = 50 Ohm
+
-
R13
R14
50
50
R15
50
For AC termination options consult the IDT Applications Note
"Ter mination - 3.3V LVPECL"
3.3V
F B2
1
2
B LM18BB 221SN 1
C19
0.1uF
VC C _38
C16
10 u F
R16
10
C8
10uF
VC C A
Logic Control Input Examples
Set Logic
Set Logic
V C C Input to '1' V C C Input to '0'
RU1
1K
To Logic
Input
pins
RD1
N ot Ins t all
RU 2
N ot I ns tal l
To Logic
Input
pins
RD 2
1K
3.3V
1
FB 3
2
C22
0.1uF
B LM18BB 221SN 1
VC C O
C 21
10 u F
Figure 9. IDT8T49N008I Application Schematic
IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014
28
©2014 Integrated Device Technology, Inc.