79RC32T336-150BCG Datasheet, PDF (26/44 Pages) Integrated Device Technology – IDTTM InterpriseTM Integrated Communications Processor

RC32336
PCICLK
Bussed output
Point to point output
Bussed input
Point to point input
Thigh_10a
Tper_10a
Tdo_10b
Tdz_10b
Tdo_10c
Tsu_10b
Thld_10b
valid
Tsu_10c
Thld_10c
valid
Figure 12 PCI AC Timing Waveform
Tlow_10a
Tzd_10b
COLDRSTN
PCIRSTN (output)
RSTN
cold reset
Tpw_10d
(tri-state)
PCI interface enabled
warm reset
Note: During and after cold reset, PCIRSTN is tri-stated and requires a pull-down to reach a low state.
After the PCI interface is enabled in host mode, PCIRSTN will be driven either high or low depending on the
reset state of the RC32336.
Figure 13 PCI AC Timing Waveform — PCI Reset in Host Mode
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October 4, 2005