IDT82V2058-10 Datasheet, PDF (25/53 Pages) Integrated Device Technology – OCTAL E1 SHORT HAUL LINE INTERFACE UNIT

IDT82V2058 OCTAL E1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL TEMPERATURE RANGES
3 PROGRAMMING INFORMATION
3.1 REGISTER LIST AND MAP
There are 21 primary registers (including an Address Pointer Control
Register and 8 expanded registers in the device).
Whatever the control interface is, 5 address bits are used to set the
registers. In non-multiplexed parallel interface mode, the five dedicated
address bits are A[4:0]. In multiplexed parallel interface mode, AD[4:0]
carries the address information. In serial interface mode, A[5:1] are used
to address the register.
The Register ADDP, addressed as 11111 or 1F Hex, switches
between primary registers bank and expanded registers bank.
By setting the register ADDP to ‘AAH’, the 5 address bits point to the
expanded register bank, that is, the expanded registers are available. By
clearing register ADDP, the primary registers are available.
Primary Registers, whose addresses are 10H, 11H, 16H to 1EH, are
reserved. Expanded registers, whose addresses are 08H to 1EH, are
used for test and must be set to ‘0’ (default).
Table-13 Primary Register List
Address
Register R/W
Hex Serial Interface A7-A1 Parallel Interface A7-A0
Explanation
00
XX00000
01
XX00001
02
XX00010
03
XX00011
04
XX00100
XXX00000
XXX00001
XXX00010
XXX00011
XXX00100
ID
R Device ID Register
ALB R/W Analog Loopback Configuration Register
RLB R/W Remote Loopback Configuration Register
TAO R/W Transmit All Ones Configuration Register
LOS R Loss of Signal Status Register
05
XX00101
06
XX00110
XXX00101
XXX00110
DF
R Driver Fault Status Register
LOSM R/W LOS Interrupt Mask Register
07
XX00111
08
XX01000
09
XX01001
0A
XX01010
0B
XX01011
0C
XX01100
0D
XX01101
XXX00111
XXX01000
XXX01001
XXX01010
XXX01011
XXX01100
XXX01101
DFM
LOSI
DFI
RS
PMON
DLB
LAC
R/W Driver Fault Interrupt Mask Register
R LOS Interrupt Status Register
R Driver Fault Interrupt Status Register
W Software Reset Register
R/W Performance Monitor Configuration Register
R/W Digital Loopback Configuration Register
R/W LOS/AIS Criteria Configuration Register
0E
XX01110
0F
XX01111
XXX01110
XXX01111
ATAO R/W Automatic TAOS Configuration Register
GCF R/W Global Configuration Register
10
XX10000
11
XX10001
12
XX10010
13
XX10011
14
XX10100
15
XX10101
XXX10000
XXX10001
XXX10010
XXX10011
XXX10100
XXX10101
OE
AIS
AISM
AISI
Reserved
R/W Output Enable Configuration Register
R AIS Status Register
R/W AIS Interrupt Mask Register
R AIS Interrupt Status Register
16
XX10110
XXX10110
17
XX10111
XXX10111
18
XX11000
XXX11000
19
XX11001
1A
XX11010
XXX11001
XXX11010
Reserved
1B
XX11011
XXX11011
1C
XX11100
XXX11100
1D
XX11101
XXX11101
1E
XX11110
1F
XX11111
XXX11110
XXX11111
ADDP
R/W
Address pointer control Register for switching between primary register bank and
expanded register bank
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