IDT82V2058-10 Datasheet, PDF (22/53 Pages) Integrated Device Technology – OCTAL E1 SHORT HAUL LINE INTERFACE UNIT

IDT82V2058 OCTAL E1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL TEMPERATURE RANGES
RTIPn
RRINGn
Slicer
LOS
Detector
CLK&Data
Recovery
(DPLL)
One of Eight Identical Channels
Jitter
Attenuator
HDB3/AMI
Decoder
LOSn
RCLKn
RDn/RDPn
CVn/RDNn
TTIPn
TRINGn
Peak
Detector
Line
Driver
Waveform
Shaper
HDB3/AMI
Encoder
TCLKn
TDn/TDPn
BPVIn/TDNn
Transmit
All Ones
Figure-17 TAOS with Analog Loopback
2.17 HOST INTERFACE
The host interface provides access to read and write the registers in
the device. The interface consists of serial host interface and parallel
host interface. By pulling pin MODE2 to VDDIO/2 or high, the device can
be set to work in serial mode and in parallel mode respectively.
Table-12 Parallel Host Interface Pins
2.17.1 PARALLEL HOST INTERFACE
The interface is compatible with Motorola and Intel host. Pins
MODE1 and MODE0 are used to select the operating mode of the
parallel host interface. When pin MODE1 is pulled low, the host uses
separate address bus and data bus. When high, multiplexed address/
data bus is used. When pin MODE0 is pulled low, the parallel host inter-
face is configured for Motorola compatible hosts. When pin MODE0 is
pulled high, the parallel host interface is configured for Intel compatible
hosts. See Table-1 Pin Description for more details. The host interface
pins in each operation mode is tabulated in Table-12:
MODE[2:0]
100
101
110
111
Host Interface
Non-multiplexed Motorola interface
Non-multiplexed Intel interface
Multiplexed Motorola interface
Multiplexed Intel interface
Generic Control, Data and Output Pin
CS, ACK, DS, R/W, AS, A[4:0], D[7:0], INT
CS, RDY, WR, RD, ALE, A[4:0], D[7:0], INT
CS, ACK, DS, R/W, AS, AD[7:0], INT
CS, RDY, WR, RD, ALE, AD[7:0], INT
CS
SCLK
SDI _R/W¹ A1 A2 A3 A4 A5 A6² A7² D0 D1 D2 D3 D4 D5 D6 D7
Address/Command Byte
Input Data Byte
SDO
D0 D1 D2 D3 D4 D5 D6 D7
High Impedance
Driven while R/W=1
1. While R/W=1, read from IDT82V2058; While R/W=0, write to IDT82V2058.
2. Ignored.
Figure-18 Serial Host Mode Timing
2.17.2 SERIAL HOST INTERFACE
By pulling pin MODE2 to VDDIO/2, the device operates in the serial
host Mode. In this mode, the registers are accessible through a 16-bit
word which contains an 8-bit command/address byte (bit R/W and 5-
address-bit A1~A5, A6 and A7 bits are ignored) and a subsequent 8-bit
data byte (D7~D0), as shown in Figure-18. When bit R/W is set to ‘1’,
data is read out from pin SDO. When bit R/W is set to ‘0’, data on pin
SDI is written into the register whose address is indicated by address
bits A5~A1. See Figure-18 Serial Host Mode Timing.
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