ADC1213S Datasheet, PDF (25/37 Pages) NXP Semiconductors – Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface

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11.6.2 Channel control
Table 17. Register allocation map
Address Register name Access^[1]
(hex)
ADC control register
0003
SPI control
R/W
0005
Reset and
R/W
Operating modes
0006
Clock
R/W
0008
Vref
R/W
0013
Offset
R/W
0014
Test pattern 1
R/W
0015
Test pattern 2 R/W
0016
Test pattern 3 R/W
JESD204A control
0801
Ser_Status
R
0802
Ser_Reset
R/W
0805
Ser_Control1
R/W
0808
0809
Ser_Analog_Ctrl R/W
Ser_ScramblerA R/W
Bit 7
-
SW_RST
-
-
-
-
RXSYNC
_ERROR
SW_RST
0
0
0
Bit 6
Bit 5
Bit definition
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
-
-
-
-
-
-
-
-
-
-
TESTPAT_3[3:0]
-
-
-
ENABLE
-
-
-
-
PD[1:0]
SE_SEL DIFF_SE
-
CLKDIV2_SEL DCS_EN
-
INTREF_EN
INTREF[2:0]
DIG_OFFSET[5:0]
-
-
TESTPAT_1[2:0]
TESTPAT_2[11:4]
-
-
-
-
RESERVED[2:0]
0
0
POR_TST RESERVED
0
0
0
RESERVED
0
SYNC_
POL
0
SYNC_
SINGLE_
ENDED
0
FSM_SW_
RST
1
0
0
0
0
REV_
SCR
REV_
ENCODER
REV_
SERIAL
SWING_SEL[2:0]
LSB_INIT[6:0]
Default^[2]
(bin)
1111 1111
0000
0000
0000
000*
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0010
0000
0000
0000
0100
1001
0000
0011
0000
0000