ADC1213S Datasheet, PDF (23/37 Pages) NXP Semiconductors – Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface

Integrated Device Technology
ADC1213S series
Single 12-bit ADC; serial JESD204A interface
11.6 Serial Peripheral Interface (SPI)
11.6.1 Register description
The ADC1213S serial interface is a synchronous serial communications port allowing for
easy interfacing with many industry microprocessors. It provides access to the registers
that control the operation of the chip in both read and write modes.
This interface is configured as a 3-wire type (SDIO as bidirectional pin).
Pin SCLK acts as the serial clock and pin CS acts as the serial chip select.
Each read/write operation is sequenced by the CS signal and enabled by a LOW level to
to drive the chip with N bytes, depending on the content of the instruction byte
(see Table 14).
Table 14. Instruction bytes for the SPI
MSB
Bit
7
6
5
4
3
2
1
Description
R/W^[1] W1
W0
A12
A11
A10
A9
A7
A6
A5
A4
A3
A2
A1
LSB
0
A8
A0
[1] R/W indicates whether a read (logic 1) or write (logic 0) transfer occurs after the instruction byte.
Table 15.
R/W^[1]
0
1
Read or Write mode access description
Description
Write mode operation
Read mode operation
[1] Bits W1 and W0 indicate the number of bytes transferred.
Table 16.
W1
0
0
1
1
Number of bytes to be transferred
W0
0
1
0
1
Number of bytes transferred
1 byte
2 bytes
3 bytes
4 or more bytes
Bits A12 to A0 indicate the address of the register being accessed. In the case of a
multiple byte transfer, this address is the first register to be accessed. An address counter
is incremented to access subsequent addresses.
The steps involved in a data transfer are as follows:
1. The falling edge on pin CS in combination with a rising edge on pin SCLK determine
the start of communications.
2. The first phase is the transfer of the 2-byte instruction.
3. The second phase is the transfer of the data which can be vary in length but is always
a multiple of 8 bits. The MSB is always sent first (for instruction and data bytes).
4. A rising edge on pin CS indicates the end of data transmission.
ADC1213S_SER 3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
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