IDT821068 Datasheet, PDF (22/45 Pages) Integrated Device Technology – OCTAL PROGRAMMABLE PCM CODEC

IDT821068 OCTAL PROGRAMMABLE PCM CODEC
INDUSTRIAL TEMPERATURE RANGE
EXAMPLES OF GCI COMMANDS
Examples of Local/Global Command and Coe-RAM/FSK-RAM
Command are shown in Table 9 and Table 10, respectively.
Table 9 - Local/Global Command Transmission Sequence in GCI
Mode
GCI Monitor Channel
Downstream
Upstream
Program Start byte (81H/91H)
Local/Global Command byte, write
Data byte 1
.
.
.
Data byte m*
Program Start byte (81H/91H)
Local/Global Command byte, read
Program Start byte (81H/91H)
Data byte 1
.
.
.
Data byte m*
Table 10 - Coe-RAM/FSK-RAM Command Transmission
Sequence in GCI Mode
GCI Monitor Channel
Downstream
Upstream
Program Start byte (81H/91H)
Coe-RAM/FSK-RAM Command
byte, write
Data word 1 (Data_H ,Data_L** )
Data word 2 (Data_H ,Data_L )
.
.
.
Data word 8 (Data_H ,Data_L )
Program Start byte (81H/91H)
Coe-RAM/FSK-RAM Command
byte, read
Program Start byte (81H/91H)
Data word 1 (Data_H ,Data_L** )
Data word 2 (Data_H ,Data_L )
.
.
.
Data word 8 (Data_H ,Data_L )
POWER-ON SEQUENCE
To power on IDT821068, users should follow this sequence:
1. Apply ground first;
2. Apply VCC, finish signal connections and set RESET low, thus
the device goes into default state;
3. Set RESET high;
4. Select master clock frequency;
5. Program filter coefficients and other parameters as required.
DEFAULT STATE AFTER RESET
When the IDT821068 is powered on, or reset either by RESET pin
or by GCI/MPI Command, the device defaults to the following state:
1. All eight channels are powered down and in standby mode;
2. All loopbacks and cutoff are disabled;
3. DX1/DU pin is selected for all channels to transmit data, DR1/
DD pin is selected for all channels to receive data;
4. The master clock frequency is 2.048 MHz;
5. For MPI operation, transmit and receive time slots are set to 0-
7 respectively for channel 1-8. The PCM data rate is the same
as Bit Clock frequency. Data is transmitted on rising edges and
received on falling edges;
For GCI operation, time slots for transmitting and receiving are
determined by TS pin. Data rate is determined by DOUBLE
pin. DD, DU clocks data on rising edges of DCL.
6. A-Law is selected;
7. Coefficients of FRX, FRR, GTX and GTR are set to be default
values. The analog gains are set to be 0 dB. IMF, GIS and
ECF are disabled. HPF is enabled (See Figure 9: Signal Flow
of Each Channel);
8. SB1 and SB2 are configured as inputs;
9. SI1 and SI2 are configured as no debounce;
10. All interrupts are disabled, all pending interrupts are cleared;
11. All feature function blocks including FSK, Dual Tone, Teletax,
Ring Trip and Level Metering are turned off;
12. CHCLK1 and CHCLK2 are set to be high.
The data stored in RAM will not be changed by any kind of resets.
In this way, the RAM data will not be lost unless the device is powered
down physically.
Notes:
* The number of the data bytes can be 1 to 4 depending on the two bits ‘b1b0’ of the Local/
Global Command.
** When addressing the Coe-RAM, the data word is 14-bit wide, the lowest two bits in Data_L
of each word are ignored; When addressing the FSK-RAM, the data word is 16-bit wide.
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