IDT821068 Datasheet, PDF (1/45 Pages) Integrated Device Technology – OCTAL PROGRAMMABLE PCM CODEC

OCTAL PROGRAMMABLE PCM CODEC
IDT821068
FEATURES
• 8 channel CODEC with on-chip digital filters
• Programmable A/µ-law compressed or linear code conversion
• Meets ITU-T G.711 - G.714 requirements
• Programmable digital filter adapting to system demands:
- AC impedance matching
- Transhybrid balance
- Frequency response correction
- Gain setting
• Supports two programmable PCM buses and one GCI bus
• Flexible PCM interface with up to 128 programmable time slots,
data rate from 512 kbits/s to 8.192 Mbits/s
• Broadcast mode for coefficient setting
• 7 SLIC signaling pins (including 2 debounced pins) per channel
• Fast hardware ring trip mechanism
• Two programmable tone generators per channel for testing,
ringing and DTMF generation
• Programmable teletax signal generation (12 kHz or 16 kHz)
• FSK generator
• Two programmable chopper clocks
• Master clock frequency selectable: 1.536 MHz, 1.544 MHz, 2.048
MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or
8.192 MHz
• Advanced test capabilities
- 3 analog loopback tests
- 5 digital loopback tests
- Level metering function
• High analog driving capability (300 Ω AC)
• TTL and CMOS compatible digital I/O
• CODEC identification
• +5 V single power supply
• Operating temperature range: - 40°C to + 85°C
• Package available: 128 pin PQFP
FUNCTIONAL BLOCK DIAGRAM
MPI INT RESET
VIN1
VOUT1
2 Inputs
2 I/Os
3 Outputs
CH1
Filter and A/D
D/A and Filter
SLIC Signaling
CH2
CH3
General
Control Logic
DSP
Core
MCLK
CHCLK1
CHCLK2
CH4
PLL and Clock
Generation
Serial Interface
CH5
Filter and A/D
D/A and Filter
SLIC Signaling
CH6
CH7
CH8
PCM/GCI Interface
VIN5
VOUT5
2 Inputs
2 I/Os
3 Outputs
DR1/DD
DR2
DX1/DU
DX2
CCLK CS CI/ CO
/TS
DOUBLE
FS BCLK TSX1 TSX2
/FSC /DCL
The IDT logo is a registered trademark of Integrated Device Technology, Inc
INDUSTRIAL TEMPERATURE RANGE
1
©2003 Integrated Device Technology, Inc.
DECEMBER 08, 2003
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