ADC1213D Datasheet, PDF (22/40 Pages) NXP Semiconductors – Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps

Integrated Device Technology
ADC1213D series
Dual 12-bit ADC; serial JESD204A interface
ADC_MODE[1:0]
PRBS
11
DUMMY 12 + 1 10
N
12 + 1 AND N + CS
CS
ADC_PD
ADC A ^{12 + 1 00}
SCR_IN_MODE[1:0]
8
00
PRBS 01
SCR
LANE_MODE[1:0]
8-bit/
10-bit
10 00
LANE_POL
'0'
01
'0/1'
10
SER
PLL
AND
DLL
× 1 frame CLK
× F character CLK
× 10F bit CLK
FRAME
ASSEMBLY
FSM
(frame assembly
character
replication
ILA
test mode)
PRBS
11
PRBS
11
SWING_SEL[2:0]
ADC B _{12 + 1 00}
ADC_PD
DUMMY 12 + 1 10
PRBS
11
N
12 + 1 AND N + CS
CS
PRBS 01
8
00
SCR
SCR_IN_MODE[1:0]
'0/1'
10
'0'
8-bit/
10-bit
01
10 00
LANE_POL
LANE_MODE[1:0]
SER
ADC_MODE[1:0]
sync_request
Fig 22. Detailed view of the JESD204A serializer with debug functionality
005aaa175
11.5.2 ADC core output codes versus input voltage
Table 13 shows the data output codes for a given analog input voltage.
Table 13. Output codes versus input voltage
INP  INM (V) Offset binary
< 1
0000 0000 0000
1.0000000 0000 0000 0000
0.9995117 0000 0000 0001
0.9990234 0000 0000 0010
0.9985352 0000 0000 0011
0.9980469 0000 0000 0100
....
....
0.0009766 0111 1111 1110
0.0004883 0111 1111 1111
0.0000000
1000 0000 0000
+0.0004883 1000 0000 0001
+0.0009766 1000 0000 0010
....
....
+0.9980469 1111 1111 1011
Two’s complement
1000 0000 0000
1000 0000 0000
1000 0000 0001
1000 0000 0010
1000 0000 0011
1000 0000 0100
....
1111 1111 1110
1111 1111 1111
0000 0000 0000
0000 0000 0001
0000 0000 0010
....
0111 1111 1011
OTR
1
0
0
0
0
0
0
0
0
0
0
0
0
0
ADC1213D_SER 8
Product data sheet
Rev. 08 — 2 July 2012
© IDT 2012. All rights reserved.
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