ADC1112D125 Datasheet, PDF (20/39 Pages) NXP Semiconductors – Dual 11-bit ADC; CMOS or LVDS DDR digital outputs

Integrated Device Technology
ADC1112D125
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
VREF
REFERENCE
AMP
BUFFER
EXT_ref
EXT_ref
BANDGAP
REFERENCE
REFAT/
REFBT
REFAB/
REFBB
SENSE
SELECTION
LOGIC
ADC CORE
Fig 20. Reference equivalent schematic
001aan670
If bit INTREF_EN is set to logic 0, the reference voltage is determined either internally or
externally as detailed in Table 12.
Table 12. Reference selection
Selection
SPI bit
INTREF_EN
Internal
0
(Figure 21)
Internal
0
(Figure 22)
External
0
(Figure 23)
Internal via SPI 1
(Figure 24)
SENSE pin VREF pin
AGND
330 pF capacitor to
AGND
pin VREF connected to pin SENSE and
via a 330 pF capacitor to AGND
V_DDA
external voltage between
0.5 V and 1 V^[1]
pin VREF connected to pin SENSE and
via 330 pF capacitor to AGND
Full-scale
(V (p-p))
2V
1V
1 V to 2 V
1 V to 2 V
[1] The voltage on pin VREF is doubled internally to generate the internal reference voltage.
Figure 21 to Figure 24 illustrate how to connect the SENSE and VREF pins to select the
required reference voltage source.
ADC1112D125 3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
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