8T49N241_16 Datasheet, PDF (20/68 Pages) Integrated Device Technology – FemtoClock NG Universal Frequency Translator

8T49N241 Datasheet
Table 7E. Digital PLL Feedback Control Register Bit Field Locations and Descriptions
Digital PLL Feedback Control Register Block Field Locations
Address (Hex)
D7
D6
D5
D4
D3
D2
D1
D0
0011
M1_0[23:16]
0012
M1_0[15:8]
0013
M1_0[7:0]
0014
M1_1[23:16]
0015
M1_1[15:8]
0016
M1_1[7:0]
0017
LCKBW[3:0]
ACQBW[3:0]
0018
LCKDAMP[2:0]
ACQDAMP[2:0]
PLLGAIN[1:0]
0019
Rsvd
Rsvd
Rsvd
Rsvd
001A
Rsvd
001B
Rsvd
001C
Rsvd
Rsvd
001D
Rsvd
001E
Rsvd
001F
FFh
0020
FFh
0021
FFh
0022
FFh
0023
SLEW[1:0]
Rsvd
HOLD[1:0]
Rsvd
HOLDAVG FASTLCK
0024
LOCK[7:0]
0025
Rsvd
DSM_INT[8]
0026
DSM_INT[7:0]
0027
Rsvd
0028
Rsvd
DSMFRAC[20:16]
0029
DSMFRAC[15:8]
002A
DSMFRAC[7:0]
002B
Rsvd
002C
01h
002D
Rsvd
002E
Rsvd
002F
DSM_ORD[1:0]
DCXOGAIN[1:0]
Rsvd
DITHGAIN[2:0]
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Revision 6, October 31, 2016