ICS93V855I Datasheet, PDF (2/9 Pages) Integrated Device Technology – Spread Spectrum tolerant inputs

ICS93V855I
Pin Descriptions
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
PIN NAME
GND
DDRC0
DDRT0
VDD2.5
CLK_INT
CLK_INC
AVDD2.5
AGND
GND
DDRC1
DDRT1
VDD2.5
DDRT2
DDRC2
GND
DDRC3
DDRT3
VDD2.5
GND
PIN TYPE
PWR
OUT
OUT
PWR
IN
IN
PWR
PWR
PWR
OUT
OUT
PWR
OUT
OUT
PWR
OUT
OUT
PWR
PWR
20
FB_INC
IN
21
FB_INT
22
VDD2.5
23
FB_OUTT
IN
PWR
OUT
24
FB_OUTC
25
GND
26
VDD2.5
27
DDRT4
28
DDRC4
OUT
PWR
PWR
OUT
OUT
DESCRIPTION
Ground pin.
"Complimentary" Clock of differential pair output.
"True" Clock of differential pair output.
Power supply, nominal 2.5V
"True" reference clock input.
"Complimentary" reference clock input.
2.5V Analog Power pin for Core PLL
Analog Ground pin for Core PLL
Ground pin.
"Complimentary" Clock of differential pair output.
"True" Clock of differential pair output.
Power supply, nominal 2.5V
"True" Clock of differential pair output.
"Complimentary" Clock of differential pair output.
Ground pin.
"Complimentary" Clock of differential pair output.
"True" Clock of differential pair output.
Power supply, nominal 2.5V
Ground pin.
Complement single-ended feedback input, provides feedback signal to
internal PLL for synchronization with CLK_INT to eliminate phase error.
True single-ended feedback input, provides feedback signal to internal
PLL for synchronization with CLK_INT to eliminate phase error.
Power supply, nominal 2.5V
True single-ended feedback output, dedicated external feedback. It
switches at the same frequency as other DDR outputs, This output must
be connect to FB_INT.
Complement single-ended feedback output, dedicated external feedback.
It switches at the same frequency as other DDR outputs, This output must
be connect to FB_INC.
Ground pin.
Power supply, nominal 2.5V
"True" Clock of differential pair output.
"Complimentary" Clock of differential pair output.
0783C—06/01/04
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