ICS91730 Datasheet, PDF (2/11 Pages) Integrated Circuit Systems – Low EMI, Spread Modulating, Clock Generator

ICS91730
LOW EMI, SPREAD MODULATING, CLOCK GENERATOR
Pin Descriptions
PIN # PIN NA ME
PIN
TYPE
DESCRIPTION
1
CLKIN
PWR Input for reference clock.
2
VDD
IN Power supply, nominal 3.3V
3
GND
OUT Ground pin.
4
CLKOUT
I/O Modulated clock output.
5
REF_OUT/FS_IN1*
I/O ^{Un-modulated 3.3V reference clock output.}
Frequency select latch input. Refer to the functionality table.
6
SDATA
PWR Data pin for SMBus circuitry, 5V tolerant.
7
SCLK
PWR Clock pin of SMBus circuitry, 5V tolerant.
Asynchronous active low input pin, with 120Kohm internal pull-up resistor,
8
PD#*
PWR used to pow er down the device. The internal clocks are disabled and the
VCO and the crystal are stopped.
* Internal Pull-Up R esistor ** Internal Pull-Down R esistor
IDT® LOW EMI, SPREAD MODULATING, CLOCK GENERATOR
2
ICS91730
REV F 061611