ICS8422002I-01 Datasheet, PDF (2/15 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER

ICS8422002I-01
FEMTOCLOCKS™ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER
PRELIMINARY
Table 1. Pin Descriptions
Number
1, 7
2, 20
3, 4
5
6
8
9, 11
10, 16
12, 13
14
15
17
18, 19
Name
nc
V_DDO
Q0, nQ0
MR
nPLL_SEL
V_DDA
F_SEL0,
F_SEL1
V_DD
XTAL_OUT,
XTAL_IN
REF_CLK
nXTAL_SEL
GND
nQ1, Q1
Type
Unused
Power
Output
Input Pulldown
Input Pulldown
Power
Description
No connect.
Output supply pins.
Differential output pair. LVHSTL interface levels.
Active HIGH Master Reset. When logic HIGH, the internal dividers are reset
causing the true outputs Qx to go low and the inverted outputs nQx
to go high. When logic LOW, the internal dividers and the outputs are
enabled. LVCMOS/LVTTL interface levels.
Selects between the PLL and REF_CLK as input to the dividers. When LOW,
selects PLL (PLL Enable). When HIGH, deselects the reference clock (PLL
Bypass). LVCMOS/LVTTL interface levels.
Analog supply pin.
Input Pulldown Frequency select pins. LVCMOS/LVTTL interface levels.
Power
Input
Input
Input
Power
Output
Pulldown
Pulldown
Core supply pins.
Parallel resonant crystal interface. XTAL_OUT is the output,
XTAL_IN is the input.
Single-ended reference clock input. LVCMOS/LVTTL interface levels.
Selects between crystal or REF_CLK inputs as the PLL Reference source.
Selects XTAL inputs when LOW. Selects REF_CLK when HIGH.
LVCMOS/LVTTL interface levels.
Power supply ground.
Differential output pair. LVHSTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
C_IN
Input Capacitance
R_PULLDOWN Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
kΩ
IDT™ / ICS™ LVHSTL FREQUENCY SYNTHESIZER
2
ICS8422002AGI-01 REV. C NOVEMBER 1, 2007