831742I Datasheet, PDF (2/20 Pages) Integrated Device Technology – 4:2 Differential Clock/Data Multiplexer

831742I Data Sheet
Table 1. Pin Descriptions
Number
1, 9, 15
2
3
4, 12,
16, 21
5
6
7
8
10
11
13
Name
GND
CLK0
nCLK0
V_DD
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
nOEA
Power
Input
Input
Power
Input
Input
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown/Pullup
Description
Power supply ground.
Non-inverting clock/data input.
Inverting differential clock/data input. V_DD/2 default when left floating.
Positive power supply.
Pulldown
Pulldown/Pullup
Pulldown
Pulldown/Pullup
Pulldown
Pulldown/Pullup
Pullup
Non-inverting clock/data input.
Inverting differential clock/data input. V_DD/2 default when left floating.
Non-inverting clock/data input.
Inverting differential clock/data input. V_DD/2 default when left floating.
Non-inverting clock/data input.
Inverting differential clock/data input. V_DD/2 default when left floating.
Output enable for the QA output. See Table 3A for function.
LVCMOS/LVTTL interface levels.
14
17, 18
19, 20
nOEB
QA, nQA
QB, nQB
Input
Output
Output
Pullup
Output enable for the QB output. See Table 3B for function.
LVCMOS/LVTTL interface levels.
Differential output pair. HCSL interface levels.
Differential output pair. HCSL interface levels.
22, 24 SEL0, SEL1 Input
23
IREF
Input
Pulldown
Differential clock/data Input select. See Table 3C for function.
LVCMOS/LVTTL interface levels.
An external fixed precision resistor (475) from this pin to ground provides a
reference current used for the differential current-mode QX, nQX outputs.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
C_IN
R_PULLUP
R_PULLDOWN
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
©2016 Integrated Device Technology, Inc
2
April 5, 2016