8302I-01 Datasheet, PDF (2/8 Pages) Integrated Device Technology – Low Skew, 1-to-2 LVCMOS / LVTTL Fanout Buffer W/ Complementary Output

8302I-01 Datasheet
TABLE 1. PIN DESCRIPTIONS
Number Name
Type
Description
1, 6
V_DDO
Power
Output supply pins.
2
V_DD
Power
Power supply pin.
3
CLK
Input Pulldown LVCMOS / LVTTL clock input.
4,7
GND
Power
Power supply ground.
5
nQ
Output
Complementary clock output. LVCMOS / LVTTL interface levels.
8
Q
Output
Clock output. LVCMOS / LVTTL interface levels.
NOTE: Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
C_IN
Input Capacitance
C_PD
Power Dissipation Capacitance
(per output)
R
PULLDOWN
R_OUT
Input Pulldown Resistor
Output Impedance
Test Conditions
V_DD, V_DDO = 3.465V
V_DD = 3.465V, V_DDO = 2.625V
Minimum
5
Typical
4
22
16
51
7
Maximum
12
Units
pF
pF
pF
kΩ
Ω
©2017 Integrated Device Technology, Inc.
2
May 4, 2017