IDT82P2282_09 Datasheet, PDF (19/381 Pages) Integrated Device Technology – Dual T1/E1/J1 Long Haul / Short Haul Transceiver

IDT82P2282
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Name
Type Pin No.
Description
A[0]
Input
52 A[8:0]: Address Bus
A[1]
53 In parallel mode, the signals on these pins select the register for the microprocessor to access.
A[2]
54 In SPI mode, these pins should be connected to the ground.
A[3]
55 A[8:0] are Schmitt-trigger inputs with pull-down resistor.
A[4]
56
A[5]
57
A[6]
60
A[7]
62
A[8]
63
D[0] / SDO Output / Input 34 D[7:0]: Bi-directional Data Bus
D[1]
35 In parallel mode, the signals on these pins are the data for Read / Write operation.
D[2]
36 In SPI mode, the D[7:1] pins should be connected to the ground through a 10 K resistor.
D[3]
37 D[7:0] are Schmitt-trigger inputs/outputs.
D[4]
38
D[5]
39 SDO: Serial Data Output
D[6]
41 In SPI mode, the data is serially output on this pin.
D[7]
43
MPM
Input
32 MPM: Micro Controller Mode
In parallel mode, set this pin low for Motorola mode or high for Intel mode.
In SPI mode, set this pin to a fixed level (high or low). This pin is useless in SPI mode.
MPM is a Schmitt-trigger input.
RW / WR / SDI
Input
47 RW: Read / Write Select
In parallel Motorola mode, this pin is active high for read operation and active low for write operation.
WR: Write Strobe (Active Low)
In parallel Intel mode, this pin is active low for write operation.
SDI: Serial Data Input
In SPI mode, the address/control and/or data are serially input on this pin.
DS / RD / SCLK
Input
RW / WR / SDI is a Schmitt-trigger input.
46 DS: Data Strobe (Active Low)
In parallel Motorola mode, this pin is active low.
RD: Read Strobe (Active Low)
In parallel Intel mode, this pin is active low for read operation.
SCLK: Serial Clock
In SPI mode, this pin inputs the timing for the SDO and SDI pins. The signal on the SDO pin is updated on the falling
edge of SCLK, while the signal on the SDI pin is sampled on the rising edge of SCLK.
SPIEN
TRST
DS / RD / SCLK is a Schmitt-trigger input.
Input
33 SPIEN: Serial Microprocessor Interface Enable
When this pin is low, the microprocessor interface is in parallel mode.
When this pin is high, the microprocessor interface is in SPI mode.
SPIEN is a Schmitt-trigger input.
JTAG (per IEEE 1149.1)
Input
97 TRST: Test Reset (Active Low)
A low signal on this pin resets the JTAG test port. This pin is a Schmitt-triggered input with an internal pull-up resistor. It
must be connected to the RESET pin or ground when JTAG is not used.
Pin Description
19
August 20, 2009