ICS9LPR501 Datasheet, PDF (18/22 Pages) Integrated Circuit Systems – 64-pin CK505 w/Fully Integrated Voltage Regulator

Integrated
Circuit
Systems, Inc.
Byte 16 CK505 PLL1 Spread Spectrum Control Register
Bit Pin
Name
Description
7
Reserved
Reserved
6
SSP14
5
SSP13
4
SSP12
These Spread Spectrum bits will program the
3
SSP11
spread pecentage. Contact ICS for the correct
2
SSP10
values.
1
SSP9
0
SSP8
Type
RW
RW
RW
RW
RW
RW
RW
RW
Byte 17 CK505 PLL3 M/N Programming Register
Bit Pin
7
6
5
4
3
2
1
0
Name
N Div8
N Div9
M Div5
M Div4
M Div3
M Div2
M Div1
M Div0
Description
N Divider 8
N Divider 9
The decimal representation of M Div (5:0) is equal
to reference divider value. Default at power up =
latch-in or Byte 0 Rom table.
Type
RW
RW
RW
RW
RW
RW
RW
RW
Byte 18 CK505 PLL3 M/N Programming Register
Bit Pin
Name
Description
Type
7
N Div7
RW
6
N Div6
RW
5
4
N Div5
N Div4
The decimal representation of N Div (9:0) is equal
to VCO divider value. Default at power up = latch-
RW
RW
3
N Div3
in or Byte 0 Rom table.
RW
2
N Div2
RW
1
N Div1
RW
0
N Div0
RW
Byte 19 CK505 PLL3 Spread Spectrum Control Register
Bit Pin
Name
Description
7
SSP7
6
SSP6
5
SSP5
These Spread Spectrum bits will program the
4
SSP4
spread pecentage. Contact ICS for the correct
3
SSP3
values.
2
SSP2
1
SSP1
0
SSP0
Type
RW
RW
RW
RW
RW
RW
RW
RW
Byte 20 CK505 PLL3 Spread Spectrum Control Register
Bit Pin
Name
Description
7
Reserved
Reserved
6
SSP14
5
SSP13
4
SSP12
These Spread Spectrum bits will program the
3
SSP11
spread pecentage. Contact ICS for the correct
2
SSP10
values.
1
SSP9
0
SSP8
Type
RW
RW
RW
RW
RW
RW
RW
RW
Byte 21 M/N Enables
Bit Pin
7
6
5
4
3
2
1
0
Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
M/N Enable CPU
M/N Enable SRC/PCI
1118F—11/06/07
Description
Type
RW
RW
RW
RW
RW
RW
RW
RW
18
0
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
0
Disable
Disable
ICS9LPR501
1
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
1
Enable
Enable
Default
0
x
X
X
X
X
X
X
Default
X
X
X
X
X
X
X
X
Default
X
X
X
X
X
X
X
X
Default
X
X
X
X
X
X
X
X
Default
0
X
X
X
X
X
X
X
Default
0
0
0
0
0
0
0
0