ICS9LPR501 Datasheet, PDF (1/22 Pages) Integrated Circuit Systems – 64-pin CK505 w/Fully Integrated Voltage Regulator

Integrated
Circuit
Systems, Inc.
ICS9LPR501
64-pin CK505 w/Fully Integrated Voltage Regulator
Recommended Application:
CK505 compliant clock with fully integrated voltage regulator
Output Features:
• 2 - CPU differential low power push-pull pairs
• 10 - SRC differential low power push-pull pairs
• 1 - CPU/SRC selectable differential low power push-pull
pair
• 1 - SRC/DOT selectable differential low power push-pull
pair
• 5 - PCI, 33MHz
• 1 - PCI_F, 33MHz free running
• 1 - USB, 48MHz
• 1 - REF, 14.318MHz
Key Specifications:
• CPU outputs cycle-cycle jitter < 85ps
• SRC output cycle-cycle jitter < 125ps
• PCI outputs cycle-cycle jitter < 250ps
• +/- 100ppm frequency accuracy on CPU & SRC clocks
Features/Benefits:
• Does not require external pass transistor for voltage
regulator
• Supports spread spectrum modulation, default is 0.5%
down spread
• Uses external 14.318MHz crystal, external crystal load
caps are required for frequency tuning
• Selectable between one SRC differential push-pull pair
and two single-ended outputs
Pin Configuration
PCI0/CR#_A 1
64 SCLK
VDDPCI 2
63 SDATA
PCI1/CR#_B 3
62 REF0/FSLC/TEST_SEL
PCI2/TME 4
61 VDDREF
PCI3 5
60 X1
PCI4/SRC5_EN 6
59 X2
PCI_F5/ITP_EN 7
58 GNDREF
GNDPCI 8
57 FSLB/TEST_MODE
VDD48 9
56 CK_PWRGD/PD#
USB_48MHz/FSLA 10
55 VDDCPU
GND48 11
54 CPUT0
VDD96_IO 12
53 CPUC0
DOTT_96/SRCT0 13
52 GNDCPU
DOTC_96/SRCC0 14
51 CPUT1_F
GND 15
50 CPUC1_F
VDD 16
49 VDDCPU_IO
SRCT1/SE1 17
48 NC
SRCC1/SE2 18
47 CPUT2_ITP/SRCT8
GND 19
46 CPUC2_ITP/SRCC8
VDDPLL3_IO 20
45 VDDSRC_IO
SRCT2/SATAT 21
44 SRCT7/CR#_F
SRCC2/SATAC 22
43 SRCC7/CR#_E
GNDSRC 23
42 GNDSRC
SRCT3/CR#_C 24
41 SRCT6
SRCC3/CR#_D 25
40 SRCC6
VDDSRC_IO 26
39 VDDSRC
SRCT4 27
38 PCI_STOP#/SRCT5
SRCC4 28
37 CPU_STOP#/SRCC5
GNDSRC 29
36 VDDSRC_IO
SRCT9 30
35 SRCC10
SRCC9 31
34 SRCT10
SRCC11/CR#_G 32
33 SRCT11/CR#_H
64-pin TSSOP
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
Table 1: CPU Frequency Select Table
FSLC²
B0b7
FSLB¹
B0b6
FSLA¹
B0b5
CPU
MHz
SRC
MHz
PCI REF
MHz MHz
0
0
0
266.66
0
0
1
133.33
0
1
0
200.00
0
1
1
166.66 100.00 33.33 14.318
1
0
0
333.33
1
0
1
100.00
1
1
0
400.00
1
1
1
Reserved
1. FS_LA and FS_LB are low-threshold inputs.Please see V_{IL_FS} and V_{IH_FS} specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FS_LC is a three-level input. Please see the V_{IL_FS} and V_{IH_FS}
specifications in the Input/Supply/Common Output Parameters Table for correct values.
USB
MHz
48.00
DOT
MHz
96.00
1118F—11/06/07