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853S058 Datasheet, PDF (15/19 Pages) Integrated Device Technology – Maximum output frequency
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pair.
The LVPECL output driver circuit and termination are shown in Figure 6.
VCC
853S058 DATA SHEET
Q1
VOUT
RL
50Ω
VCC - 2V
Figure 6. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of
VCC – 2V.
• For logic high, VOUT = VOH_MAX = VCC_MAX – 0.875V
(VCC_MAX – VOH_MAX) = 0.875V
• For logic low, VOUT = VOL_MAX = VCC_MAX – 1.62V
(VCC_MAX – VOL_MAX) = 1.62V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(VOH_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOH_MAX) = [(2V – (VCC_MAX – VOH_MAX))/RL] * (VCC_MAX – VOH_MAX) =
[(2V – 0.875V)/50] * 0.875V = 19.69mW
Pd_L = [(VOL_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOL_MAX) = [(2V – (VCC_MAX – VOL_MAX))/RL] * (VCC_MAX – VOL_MAX) =
[(2V – 1.62V)/50] * 1.62V = 12.31mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 32mW
REVISION B 1/6/15
15
8:1 DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL
CLOCK MULTIPLEXER