ICS951464 Datasheet, PDF (14/24 Pages) Integrated Device Technology – Programmable System Clock Chip for ATI RS/RD690 K8TM - based Systems

ICS951464
IDT^TM/ICST^M Programmable System Clock Chip for ATI RS/RD690 K8^TM - based Systems
SMBus Table: ATIG PLL Spread Spectrum Control Register
Byte 18 Pin #
Name
Control Function
Bit 7
Reserved
Bit 6
-
SSP14
Bit 5
-
SSP13
Bit 4
-
Bit 3
-
Bit 2
-
SSP12
SSP11
SSP10
Spread Spectrum Programming
b(14:8)
Bit 1
-
SSP9
Bit 0
-
SSP8
Type
RW
RW
RW
RW
RW
RW
RW
SMBus Table: CPU and ATIG Divider Ratio Programming Bits Select Register
Byte 19 Pin #
Name
Control Function
Bit 7
-
CPU_Div3
Bit 6
-
Bit 5
-
CPU_Div2
CPU_Div1
CPU_Divider Ratio
Programming Bits
Bit 4
-
CPU_Div0
Bit 3
-
ATIG_Div3
Bit 2
-
Bit 1
-
ATIG_Div2
ATIG_Div1
ATIG_Divider Ratio
Programming Bits
Bit 0
-
ATIG_Div0
Type
RW
RW
RW
RW
RW
RW
RW
RW
SMBus Table: HTT Divider Ratio Programming Bits Select Register
Byte 20 Pin #
Name
Control Function
Bit 7
Reserved
Bit 6
Reserved
Bit 5
Reserved
Bit 4
Reserved
Bit 3
-
HTT_Div3
Bit 2
-
Bit 1
-
HTT_Div2
HTT_Div1
HTT_Divider Ratio
Programming Bits
Bit 0
-
HTT_Div0
Type
RW
RW
RW
RW
0
1
PWD
0
X
These Spread Spectrum bits _X
in Byte 19 and 20 will program _X
the spread pecentage. It is
recommended to use ICS
X
Spread % table for spread ^X
programming.
X
X
0
1
See Table 4:
CPU Divider Ratios
See Table 5:
ATIG Divider Ratios
PWD
X
X
X
X
X
X
X
X
0
1
See Table 6:
HTT Divider Ratios
PWD
0
0
0
0
X
X
X
X
IDT^TM/ICST^M Programmable System Clock Chip for ATI RS/RD690 K8^TM - based Systems
14
1211B—09/17/09