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ICS9LPRS365BGLFT Datasheet, PDF (13/28 Pages) Integrated Device Technology – 64-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor
Integrated
Circuit
Systems, Inc.
ICS9LPRS365
Advance Information
Electrical Characteristics - SMBus Interface
PARAMETER
SYMBOL
CONDITIONS
SMBus Voltage
VDD
Low-level Output Voltage
VOLSMB
@ IPULLUP
Current sinking at
VOLSMB = 0.4 V
IPULLUP
SMB Data Pin
SCLK/SDATA
Clock/Data Rise Time
TRI2C
(Max VIL - 0.15) to
(Min VIH + 0.15)
SCLK/SDATA
Clock/Data Fall Time
TFI2C
(Min VIH + 0.15) to
(Max VIL - 0.15)
Maximum SMBus Operating
Frequency
FSMBUS
Block Mode
1Guaranteed by design and characterization, not 100% tested in production.
MIN
MAX
UNITS
2.7
5.5
V
0.4
V
4
mA
1000
ns
300
ns
100
kHz
AC Electrical Characteristics - Input/Common Parameters
PARAMETER
SYMBOL
CONDITIONS
MIN
Clk Stabilization
TSTAB
From VDD Power-Up or de-
assertion of PD# to 1st clock
Tdrive_SRC
TDRSRC
SRC output enable after
PCI_STOP# de-assertion
Tdrive_PD#
TDRPD
Differential output enable after
PD# de-assertion
Tdrive_CPU
TDRSRC
CPU output enable after
CPU_STOP# de-assertion
Tfall_PD#
TFALL
Fall/rise time of PD#, PCI_STOP#
Trise_PD#
TRISE
and CPU_STOP# inputs
1 Guaranteed by design and characterization, not 100% tested in production.
2 Optional. Only applies when PCI_STOP# and/or CPU_STOP# is present.
MAX
1.8
15
300
10
5
5
UNITS
ms
ns
us
ns
ns
ns
AC Electrical Characteristics - Low Power Differential Outputs
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
Rising Edge Slew Rate
tSLR
Differential Measurement
Falling Edge Slew Rate
tFLR
Differential Measurement
Slew Rate Variation
tSLVAR
Single-ended Measurement
Maximum Output Voltage
VHIGH
Includes overshoot
Minimum Output Voltage
VLOW
Includes undershoot
Differential Voltage Swing
VSWING
Differential Measurement
Crossing Point Voltage
VXABS
Single-ended Measurement
Crossing Point Variation
VXABSVAR
Single-ended Measurement
Duty Cycle
DCYC
Differential Measurement
CPU Jitter - Cycle to Cycle
CPUJC2C
Differential Measurement
SRC Jitter - Cycle to Cycle
SRCJC2C
Differential Measurement
DOT Jitter - Cycle to Cycle
DOTJC2C
Differential Measurement
CPU[1:0] Skew
CPUSKEW10
Differential Measurement
CPU[2_ITP:0] Skew
CPUSKEW20
Differential Measurement
SRC[10:0] Skew
SRCSKEW
Differential Measurement
*TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =5pF, RS=22Ω (unless specified otherwise.)
1Guaranteed by design and characterization, not 100% tested in production.
2.5
2.5
-300
300
300
45
8
8
20
1150
550
140
55
85
125
250
100
150
TBD
2 Slew rate measured through Vswing centered around differential zero
3 Vxabs is defined as the voltage where CLK = CLK#
4 Only applies to the differential rising edge (CLK rising and CLK# falling)
5 Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of
CLK and falling edge of CLK#.
UNITS
V/ns
V/ns
%
mV
mV
mV
mV
mV
%
ps
ps
ps
ps
ps
ps
1218—09/09/09
Notes
1
1
1
1
1
1
Notes
1
1,2
1
1,2
1,2
1,2
NOTES
1,2
1,2
1
1
1
1
1,3,4
1,3,5
1
1
1
1
1
1
1
13