ICS844001-21 Datasheet, PDF (12/17 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER

ICS844001-21
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
POWER CONSIDERATIONS
PRELIMINARY
This section provides information on power dissipation and junction temperature for the ICS844001-21.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS844001-21 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V = 3.3V + 5% = 3.465V, which gives worst case results.
DD
Core and LVDS Output Power Dissipation
• Power (core, LVDS) = V * (I + I
+ I ) = 3.465V * (110mA + 40mA + 15mA) = 572mW
DD_MAX
DD
DDO_LVDS
DDA
LVCMOS Output Power Dissipation
• Output Impedance R Power Dissipation due to Loading 50Ω to V
/2
OUT
DDO_CMOS
Output Current I_OUT = V_{DDO_CMOS_MAX} / [2 * (50Ω + R_OUT)] = 3.465V / [2 * (50Ω + 7Ω)] = 30.4mA
• Power Dissipation on the R_OUT per LVCMOS output
Power (R_OUT) = R_OUT * (I_OUT)² = 72Ω * (30.4mA)² = 6.47mW per output
• Dynamic Power Dissipation at 25MHz
Power (25MHz) = C_PD * frequency * (V_{DDO_CMOS})² = 8pF * 25MHz * (3.465V)² = 2.4 mW
Total Power Dissipation
• Total Power
= Power (core, LVDS) + Total Power (R_OUT) + Total Power (125MHz) + Total Power (25MHz)
= 572mW + 6.47mW + 2.4mW
= 581mW
IDT^™ / ICS^™ INSERT PRODUCT NAME
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ICS844001AG-21 REV. A SEPTEMBER 14, 2007