9DBV0231_16 Datasheet, PDF (12/17 Pages) Integrated Device Technology – 2-output 1.8V PCIe Gen1/2/3 Zero Delay /Fanout Buffer

9DBV0231 DATASHEET
SMBus Table: Revision and Vendor ID Register
Byte 5
Name
Control Function
Bit 7
RID3
Bit 6
Bit 5
RID2
RID1
Revision ID
Bit 4
RID0
Bit 3
VID3
Bit 2
Bit 1
VID2
VID1
VENDOR ID
Bit 0
VID0
Type
R
R
R
R
R
R
R
R
0
1
A rev = 0000
0001 = IDT
Default
0
0
0
0
0
0
0
1
SMBus Table: Device Type/Device ID
Byte 6
Name
Bit 7
Device Type1
Bit 6
Device Type0
Bit 5
Device ID5
Bit 4
Device ID4
Bit 3
Device ID3
Bit 2
Device ID2
Bit 1
Device ID1
Bit 0
Device ID0
Control Function
Device Type
Device ID
Type
R
R
R
R
R
R
R
R
0
1
00 = FGx, 01 = DBx,
10 = DMx, 11= Reserved
000100 binary or 02 hex
Default
0
1
0
0
0
0
1
0
SMBus Table: Byte Count Register
Byte 7
Name
Bit 7
Bit 6
Bit 5
Bit 4
BC4
Bit 3
BC3
Bit 2
BC2
Bit 1
BC1
Bit 0
BC0
Control Function
Reserved
Reserved
Reserved
Byte Count Programming
Type
0
1
RW
RW Writing to this register will configure how
RW many bytes will be read back, default is
RW
= 8 bytes.
RW
Default
0
0
0
0
1
0
0
0
2-OUTPUT 1.8V PCIE GEN1/2/3 ZERO DELAY / FANOUT BUFFER
12
REVISION F 04/28/16