ICS843246I Datasheet, PDF (11/17 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

ICS843246I
FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/FANOUT BUFFER
LAYOUT GUIDELINE
Figure 5 shows an example of ICS843246I application sche-
matic. In this example, the device is operated at V_CC = 3.3V. The
18pF parallel resonant 25MHz crystal is used. The C1 = 22pF
and C2 = 22pF are recommended for frequency accuracy. For
different board layout, the C1 and C2 may be slightly adjusted
for optimizing frequency accuracy. Two examples of LVPECL
termination are shown in this schematic. Additional termination
approaches are shown in the LVPECL Termination Application
Note.
VCC
R2
10 C3
10uF
PLL_BY PASS
VCCA
C4
0.01u
3.3V
R3
R5
133
133
Zo = 50 Ohm
+
Logic Control Input Examples
Set Logic
VDD _{Input to}
'1'
RU1
1K
Set Logic
VDD _{Input to}
'0'
RU2
Not Install
To Logic
Input
pins
RD1
Not Install
To Logic
Input
pins
RD2
1K
FB_SEL
VCC
VCCO
VCC_(U1-11)
C5
0.1uF
C2
22pF
(U1-1)
(U1-2)
VCCO
C6
0.1uF
C7
0.1uF
U1
843246I
X1
25MHz
18pF
C1
22pF
N_SEL0
N_SEL1
Zo = 50 Ohm
R4
82.5
-
R6
82.5
VCC=3.3V
VCCO=3.3V
Zo = 50 Ohm
Zo = 50 Ohm
R7
50
+
-
R8
50
Optional
R9
Y-Termination
50
FIGURE 5. SCHEMATIC OF RECOMMENDED LAYOUT
THERMAL RELEASE PATH
The expose metal pad provides heat transfer from the device
to the P.C. board. The expose metal pad is ground pad
connected to ground plane through thermal via. The exposed
pad on the device to the exposed metal pad on the PCB is
contacted through solder as shown in Figure 4. For further
information, please refer to the Application Note on Surface
Mount Assembly of Amkor’s Thermally /Electrically Enhance
Leadframe Base Package, Amkor Technology.
SOLDER M ASK
SIGNAL
TRACE
EXPOSED PAD
SOLDER
SIGNAL
TRACE
GROUND PLANE
THERMAL VIA
Expose Metal Pad
(GROUND PAD)
FIGURE 6. P.C. BOARD FOR EXPOSED PAD THERMAL RELEASE PATH EXAMPLE
IDT^™ / ICS^™ 3.3V LVPECL FREQUENCY SYNTHESIZER
11
ICS843246BGI REV. A AUGUST 2, 2007