|
9ZXL1530 Datasheet, PDF (11/19 Pages) Integrated Device Technology – Fixed feedback path | |||
|
◁ |
9ZXL1530
15-OUTPUT LOW POWER DIFFERENTIAL ZBUFFER FOR PCIE GEN3 AND QPI
General SMBus Serial Interface Information
How to Write
⢠Controller (host) sends a start bit
⢠Controller (host) sends the write address
⢠IDT clock will acknowledge
⢠Controller (host) sends the beginning byte location = N
⢠IDT clock will acknowledge
⢠Controller (host) sends the byte count = X
⢠IDT clock will acknowledge
⢠Controller (host) starts sending Byte N through Byte
N+X-1
⢠IDT clock will acknowledge each byte one at a time
⢠Controller (host) sends a Stop bit
Index Block Write Operation
Controller (Host)
T
starT bit
IDT (Slave/Receiver)
Slave Address
WR
WRite
ACK
Beginning Byte = N
ACK
Data Byte Count = X
ACK
Beginning Byte N
ACK
O
O
O
O
O
O
Byte N + X - 1
ACK
P
stoP bit
How to Read
⢠Controller (host) will send a start bit
⢠Controller (host) sends the write address
⢠IDT clock will acknowledge
⢠Controller (host) sends the beginning byte location = N
⢠IDT clock will acknowledge
⢠Controller (host) will send a separate start bit
⢠Controller (host) sends the read address
⢠IDT clock will acknowledge
⢠IDT clock will send the data byte count = X
⢠IDT clock sends Byte N+X-1
⢠IDT clock sends Byte 0 through Byte X (if X(H) was
written to Byte 8)
⢠Controller (host) will need to acknowledge each byte
⢠Controller (host) will send a not acknowledge bit
⢠Controller (host) will send a stop bit
Index Block Read Operation
Controller (Host)
T
starT bit
IDT (Slave/Receiver)
Slave Address
WR
WRite
ACK
Beginning Byte = N
ACK
RT
Repeat starT
Slave Address
RD
ReaD
ACK
ACK
ACK
O
O
O
N
Not acknowledge
P
stoP bit
Data Byte Count=X
Beginning Byte N
O
O
O
Byte N + X - 1
IDT® 15-OUTPUT LOW POWER DIFFERENTIAL ZBUFFER FOR PCIE GEN3 AND QPI
11
9ZXL1530
REV C 031312
|
▷ |