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97U877AHLF Datasheet, PDF (11/13 Pages) Integrated Device Technology – 1.8V Wide Range Frequency Clock Driver | |||
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ICS97U8 7 7
Figure 11. AVDD Filtering
- Place the 2200pF capacitor close to the PLL.
- Use a wide trace for the PLL analog power & ground. Connect PLL & caps to AGND trace & connect trace to one
GND via (farthest from PLL).
- Recommended bead: Fair-Rite P/N 2506036017Y0 or equivalent (0.8 Ohm DC max, 600 Ohms @ 100 MHz).
0792Aâ04/15/04
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