8421002I-01 Datasheet, PDF (10/15 Pages) Integrated Device Technology – FemtoClock Crystal-to-HSTL Frequency Synthesizer

8421002I-01 DATA SHEET
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
HSTL output driver circuit and termination are shown in Figure 3.
FIGURE 3. HSTL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load.
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = (V /R ) * (V - V )
OH_MAX L
DD_MAX
OH_MAX
Pd_L = (V /R ) * (V - V )
OL_MAX L
DD_MAX
OL_MAX
Pd_H = (1V/50Ω) * (2V - 1V) = 20mW
Pd_L = (0.4V/50Ω) * (2V - 0.4V) = 12.8mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 32.8mW
FEMTOCLOCKS™ CRYSTAL-TO-HSTL
10
FREQUENCY SYNTHESIZER
REVISION B 8/14/15