QS5LV931 Datasheet, PDF (1/8 Pages) Integrated Device Technology – 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER

QS5LV931
3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
3.3V LOW SKEW CMOS PLL
CLOCK DRIVER WITH
INTEGRATED LOOP FILTER
INDUSTRIAL TEMPERATURE RANGE
QS5LV931
FEATURES:
• 3.3V operation
• JEDEC LVTTL compatible level
• Clock input is 5V tolerant
• Q outputs, Q/2 output
• <300ps output skew, Q0–Q4
• Outputs 3-state and reset while OE/RST low
• PLL disable feature for low frequency testing
• Internal loop filter RC network
• Internal VCO/2 option
• Balanced drive outputs ±24mA
• ESD >2000V
• 80MHz maximum frequency
• Available in QSOP package
DESCRIPTION:
The QS5LV931 Clock Driver uses an internal phase locked loop
(PLL) to lock low skew outputs to a reference clock input. Six outputs
are available: Q0–Q4, Q/2. Careful layout and design ensure <300ps
skew between the Q0–Q4, and Q/2 outputs. The QS5LV931 includes
an internal RC filter which provides excellent jitter characteristics and
eliminates the need for external components. Various combinations of
feedback and a divide-by-2 in the VCO path allow applications to be
customized for linear VCO operation over a wide range of input SYNC
frequencies. The PLL can also be disabled by the PLL_EN signal to
allow low frequency or DC testing. The QS5LV931 is designed for use
in cost sensitive high-performance computing systems, workstations,
multi-board computers, networking hardware, and mainframe systems.
Several can be used in parallel or scattered throughout a system for
guaranteed low skew, system-wide clock distribution networks. In the
QSOP package, the QS5LV931 clock driver represents the best value
in small form factor, high-performance clock management products.
For more information on PLL clock driver products, see Application
Note AN-227.
FUNCTIONAL BLOCK DIAGRAM
SYNC
O E /R S T
FEEDBACK
PHASE
D ETE C TO R
LOOP
FILTER
VCO
PLL_EN
FREQ_SEL
0
1
1
/2
0
R
D
R
D
R
D
R
D
R
D
R
D
Q
Q
Q
Q
Q
Q
Q
Q /2
Q4
Q3
Q2
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c 2002 Integrated Device Technology, Inc.
Q1
Q0
JANUARY 2002
DSC-5821/2