IDTF1953 Datasheet, PDF (1/17 Pages) Integrated Device Technology – 6-bit Digital Step Attenuator

6-bit Digital Step Attenuator
GENERAL DESCRIPTION
This document describes the specification for the
IDTF1953 Digital Step Attenuator. The F1953 is part of a
family of Glitch-Free^TM DSAs optimized for the demanding
requirements of communications Infrastructure. These
devices are offered in a compact 4x4 QFN package with
50 Ω impedances for ease of integration.
COMPETITIVE ADVANTAGE
Digital step attenuators are used in Receivers and
Transmitters to provide gain control. The IDTF1953 is a
6-bit step attenuator optimized for these demanding
applications. The silicon design has very low insertion
loss and low distortion (> +60 dBm IP3_I.) The device
has pinpoint accuracy and settles to final attenuation
value within 400 nsec. Most importantly, the F1953
includes IDT’s Glitch-Free^TM technology which results in
less than 0.5 dB of overshoot ringing during MSB
transitions. This is in stark contrast to competing DSAs
that glitch as much as 10 dB (see p. 10.)
 Lowest insertion loss for best SNR
 Glitch-Free^TM when transitioning – won’t
damage PA or ADC
 Extremely accurate with low distortion
Glitch-Free^TTMM
APPLICATIONS
 Base Station 2G, 3G, 4G, TDD radiocards
 Repeaters and E911 systems
 Digital Pre-Distortion
 Point to Point Infrastructure
 Public Safety Infrastructure
 WIMAX Receivers and Transmitters
 Military Systems, JTRS radios
 RFID handheld and portable readers
 Cable Infrastructure
PART# MATRIX
Part#
F1950
F1951
F1952
F1953
Freq range
Resolution
Control
IL
/ Range
150 - 4000
0.25 / 31.75
Parallel &
Serial
-1.3
100 - 4000
0.50 / 31.5 Serial Only
-1.2
Pinout
PE43702
PE43701
HMC305
100 – 4000
400 - 4000
0.50 / 15.5
0.50 / 31.5
Serial Only
Parallel &
Serial
-0.9
HMC305
PE4302
-1.3
DAT-31R5
F1953
DATASHEET
400 to 4000 MHz IDTF1953
FEATURES
 Glitch-Free^TM, < 0.6 dB transient overshoot
 Spurious Free Design
 2.7 to 3.3 V supply
 Attenuation Error < 0.5 dB @ 2 GHz
 Low Insertion Loss < 1.4 dB @ 2 GHz
 Excellent Linearity >+60 dBm IP3_I
 Fast settling time, < 400 nsec
 Serial or Parallel Interface 31.5 dB Range
 Stable Integral Non-Linearity over temperature
 Low Power Consumption < 200 uA
 Integrated DC blocking capacitors
 Drop-In replacement
 4x4 mm Thin QFN 20 pin package
DEVICE BLOCK DIAGRAM
RF₁
RF₂
Bias
DEC
SPI
VMODE VDD
6
D[5:0] CLK DATA LE
ORDERING INFORMATION
Omit IDT
prefix
0.8 mm height
package
Tape &
Reel
IDTF1953NCGI8
RF product Line
Green
Industrial
Temp range
Glitch-Free^TM Digital Step Attenuator
1
Rev2 April2014