IDT71124_13 Datasheet, PDF (1/8 Pages) Integrated Device Technology – CMOS Static RAM 1 Meg (128K x 8-Bit) Revolutionary Pinout Equal access and cycle times

CMOS Static RAM
1 Meg (128K x 8-Bit)
Revolutionary Pinout
IDT71124
Features
◆ _{128K x 8 advanced high-speed CMOS static RAM}
◆ _{JEDEC revolutionary pinout (center power/GND) for}
reduced noise.
◆ _{Equal access and cycle times}
– Commercial: 12/15/20ns
– Industrial: 15/20ns
◆ _{One Chip Select plus one Output Enable pin}
◆ _{Bidirectional inputs and outputs directly TTL-compatible}
◆ _{Low power consumption via chip deselect}
◆ _{Available in a 32-pin 400 mil Plastic SOJ.}
Description
The IDT71124 is a 1,048,576-bit high-speed static RAM organized as
128K x 8. It is fabricated using high-performance, high-reliability CMOS
technology. This state-of-the-art technology, combined with innovative
circuit design techniques, provides a cost-effective solution for high-speed
memory needs. The JEDEC centerpower/GND pinout reduces noise
generation and improves system performance.
The IDT71124 has an output enable pin which operates as fast as 6ns,
with address access times as fast as 12ns available. All bidirectional inputs
and outputs of the IDT71124 are TTL-compatible and operation is from
a single 5V supply. Fully static asynchronous circuitry is used; no clocks
or refreshes are required for operation.
The IDT71124 is packaged in a 32-pin 400 mil Plastic SOJ.
Functional Block Diagram
A0
•
•
•
ADDRESS
•
•
DECODER
•
A16
1,048,576-BIT
MEMORY ARRAY
8
I/O0 - I/O7
•
8
WE
OE
CONTROL
CS
LOGIC
I/O CONTROL
8
,
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©2013 Integrated Device Technology, Inc.
APRIL 2013
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