IDT70V5388 Datasheet, PDF (1/29 Pages) Integrated Device Technology – 3.3V 64/32K X 18 SYNCHRONOUS FOURPORT STATIC RAM

3.3V 64/32K X 18
SYNCHRONOUS
FOURPORT™ STATIC RAM
IDT70V5388/78
Features
◆ _{True four-ported memory cells which allow simultaneous}
access of the same memory location
◆ _{Synchronous Pipelined device}
– 64/32K x 18 organization
◆ _{Pipelined output mode allows fast 200MHz operation}
◆ _{High Bandwidth up to 14 Gbps (200MHz x 18 bits wide x}
4 ports)
◆ _{LVTTL I/O interface}
◆ _{High-speed clock to data access 3.0ns (max.)}
◆ _{3.3V Low operating power}
◆ _{Interrupt flags for message passing}
◆ _{Width and depth expansion capabilities}
Port - 1 Logic Block Diagram⁽²⁾
R/WP1
0
1
1 /0
UBP1
CE0P1
CE1P1
LBP1
OEP1
◆ _{Counter wrap-around control}
– Internal mask register controls counter wrap-around
– Counter-Interrupt flags to indicate wrap-around
◆ _{Counter readback on address lines}
◆ _{Mask register readback on address lines}
◆ _{Global Master reset for all ports}
◆ _{Dual Chip Enables on all ports for easy depth expansion}
◆ _{Separate upper-word and lower-word controls on all ports}
◆ _{272-BGA package (27mm x 27mm 1.27mm ball pitch) and}
256-BGA package (17mm x 17mm 1.0mm ball pitch)
◆ _{Commercial and Industrial temperature ranges}
◆ _{JTAG boundary scan}
◆ _{MBIST (Memory Built-In Self Test) controller}
I/O9P1 - I/O17P1
I/O0P1 - I/O8P1
Addr.
Read
Back
Port 1
I/O
Control
TRST
TMS
TCK
TDI
CLKMBIST
JTAG
Controller _TDO
MBIST
Port 1
Readback
Register
MRST
A0P1 - A15P1⁽¹⁾
CNTRDP1
MKRDP1
MKLDP1
CNTINCP1
CNTLDP1
CNTRSTP1
CLKP1
Priority
Decision
Logic
MRST
CNTINTP1
Port 1
Mask
Register
Port 1
Counter/
Address
Register
R/WP1
CE0P1
CE1P1
CLKP1
NOTE:
MRST
1. A15x is a NC for IDT70V5378.
2. Port 2, Port 3, and Port 4 Logic Blocks are similar to Port 1 Logic Blocks.
Port 1
Address
Decode
Port 1
Interrupt
Logic
1
©2003 Integrated Device Technology, Inc.
INTP1
,
64KX18
Memory
Array
5649 drw 01
AUGUST 2003
DSC-5649/3